搜索资源列表
cpldfsk1
- 基于CPLD的多功能信号发生器设计.PDF-CPLD-based signal generator multifunctional design. PDF
cpld_circuit
- 基于CPLD的二进制码转换为二十进制（BCD）码的电路[1].pdf-based CPLD binary code into two decimal (BCD) code circuit [1]. Pdf
videofram
- 用CPLD控制图像卡进行帧存逻辑的verilog程序,用Quartus II 5.0打开-with CPLD control image fr a me buffer cards logical verilog procedures, Quartus II 5.0 Open
step_Motor_control
- 这是本人毕业设计的源码部分,主要完成了步进电机的智能控制:采用AVR系列单片机做主空单元,可红外遥控,其中脉冲分配由CPLD实现.-This is my graduation design source, the major completed intelligent stepper motor control : using AVR Series MCU module comes air, infrared remote contro
VHDL_Development_Board_Sources
- 这是我最近买的一套CPLD开发板VHDL源程序并附上开发板的原理图,希望对你是一个很好的帮助!其中内容为:8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟.-which I have recently bought a CPLD Development Board VHDL source cod
jurbojtag
- turbo jtag CPLD source code use altera EPM7128S -turbo jtag CPLD source code use altera EPM7 128S
triphace
- 基于可编程逻辑器件CPLD和直接数字频率合成技术（DDS）的三相多波形函数发生器-based CPLD and direct digital frequency synthesis (DDS) over the three-phase waveforms letter Number Generator
pwm_VerilogHDLV1.1
- 本软件在CPLD上实现数字PWM控制，用Verilog HDL语言编写，在MAX ＰＬＵＳ ＩＩ调试成功，可用-the software on the CPLD digital PWM control, using Verilog HDL language, MAX PLUS II in debugging success can be
testben
- 这是由xilin公司提供的测试文档，对于用XILINX公司的CPLD/FPGA的用户来说挺不错的。-xilin provided by the test documents, XILINX used for the CPLD/FPGA users quite well.
tic
- 利用单片机对CPLD进行配置,地层函数另作一个文件，移植方便-SCM right CPLD for distribution, another for the formation function, a document to facilitate transplant
CpldandEepromI2c
- verilog 编写的I2c协议程序，用于cpld读写EEPROM-verilog I2c agreement prepared by the procedures for cpld writable EEPROM
MVHDL
- 本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證-the parallel program for controlling flash ROM programs, rom flash can be read out information, After drawing CPLD controller wil
CPLD_example_50
- 50个各种不同功能的CPLD程序例子，拿来就可以用，每个都经过了综合测试，非常实用-50 different functional CPLD procedures example, can be taken out, after each of the comprehensive test very useful
cpldtodds
- dds信号发生器程序设计，框图，基于CPLD控制的DDS数字频率合成器设计-dds signal generator program design, block diagram, the CPLD based on DDS Digital Frequency Synthesizer Design
95108325
- 通过CPLD实现串行通信之VHDL语言，好看易懂-through CPLD serial communications VHDL, pretty easy to understand
CPLDFPGAprotellibrary
- CPLD FPGA常用protel库.rar-CPLD FPGA used the Protel. Rar
bingxingtongxin
- 介绍了用ALTERA公司MAX7000系列CPLD芯片实现单片机与PC104ISA总线接口之间的关行通信。给出了系统设计方法及程序源代码。 -introduces the MAX7000 Altera Corporation Series CPLD The position with SCM 04ISA bus interface between the telecommunications firms. Gives the sy
VHDLRAM
- 介绍vhdl硬件描述语言的特点及设计思想，运用vhdl硬件描述语言实现计算机原理实验中RAM存储器的设计方法，重点描述了对传统计算机组成原理实验中移植到基于CPLD平台的思想-introduced vhdl hardware descr iption language features and design ideas, vhdl use hardware descr iption language computer science e
TLC5510
- CPLD下的A/D转换器TCL5510驱动源码-CPLD under the A/D converters TCL5510 driven FOSS