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BDACardCollection
- * This file is part of DigitalWatch, a free DTV watching and recording * program for the VisionPlus DVB-T. * * DigitalWatch is free software you can redistribute it and/or modify * it under the terms of the
Mpeg2DataParser
- * This file is part of DigitalWatch, a free DTV watching and recording * program for the VisionPlus DVB-T. * * DigitalWatch is free software you can redistribute it and/or modify * it under the terms of the
LogMessageConsoleOutput
- * This file is part of DigitalWatch, a free DTV watching and recording * program for the VisionPlus DVB-T. * * DigitalWatch is free software you can redistribute it and/or modify * it under the terms of the
BDACardCollection
- * This file is part of DigitalWatch, a free DTV watching and recording * program for the VisionPlus DVB-T. * * DigitalWatch is free software you can redistribute it and/or modify * it under the terms of the
Mpeg2DataParser
- * This file is part of DigitalWatch, a free DTV watching and recording * program for the VisionPlus DVB-T. * * DigitalWatch is free software you can redistribute it and/or modify * it under the terms of the
LogMessageConsoleOutput
- * This file is part of DigitalWatch, a free DTV watching and recording * program for the VisionPlus DVB-T. * * DigitalWatch is free software you can redistribute it and/or modify * it under the terms of the
digitalwatch
- Describe: This VHDL digital clock, the use of digital control and FPGA design to achieve a number of counter clock, show hours, minutes ,seconds and alarm. The procedure depends on the metric system and consider six deci
DigitalWatch
- Digital watch write in Verilog HDL language simulate the real clock in Atera DE2 development board
DigitalWatch
- 用verilog数字钟，并且在ise上验证，可以显示分秒，并且可以对分和秒进行调整-Verilog digital clock, and verified in ise, can display every minute, and you can adjust the minutes and seconds
fvxm_pointer_reduced
- This file is part of DigitalWatch, a free DTV watching and re()