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EP2C5T144设计原理图
- EP2C5T144设计原理图
T144_PER_lcd1602
- EP2C5T144 驱动 LCD1602液晶-LCD1602 LCD driver EP2C5T144
LCD1
- 用Verilog HDL编写的16*2液晶显示one world,one dream。压缩包中包括所有文件，使用的芯片为EP2C5T144，经过最后下载测试的。-Verilog HDL prepared with 16* 2 LCD display one world, one dream. Compression package, including all documents, use the chips for EP2C5T144
clock
- 数字时钟的verilog程序，在alteral ep2c5t144调试成功-Digital clock verilog program
EP2C5T144
- EP2C5T144核心板使用手册及原理图-EP2C5T144
beep
- 在Cyclon II EP2C5T144上实现蜂鸣器演奏歌曲-In Cyclon II EP2C5T144 play the song on the realization of the buzzer
lcd
- 在Cyclon II EP2C5T144上实现LCD1602的显示 采用VerilogHDL语言编写-To achieve the Cyclon II EP2C5T144 LCD1602 display language using VerilogHDL
EP2C5T144-FPGA
- EP2C5T144-FPGA开发板使用说明书和EP2C5T144-FPGA开发板原理图1-EP2C5T144-FPGA development board manual and EP2C5T144-FPGA development board schematics 1
ep2c5t144
- EP2C5T144原理图，最小系统开发板。-EP2C5T144 schematic diagram, the minimum system development board.
DDS_12B
- 基于EP2C5T144的FPGA的12位频率控制字和12位相位控制字的DDS源代码-FPGA-based EP2C5T144 of frequency control word 12-bit and 12-bit phase control word of the DDS source code
RAMaddressGenerator
- 基于FPGA（EP2C5T144开发板）的RAM的地址发生器，初学者适用-Based on FPGA (EP2C5T144 development board) RAM address generator for beginners
EP2C5T-control-8-seg7led
- 使用EP2C5T144编译的控制8位数码管显示电路的VHDL源码-EP2C5T144 compiled using 8-bit digital display control circuit VHDL source code
ADS7825FPGA
- verilog hdl 语言，使用FPGA EP2C5T144驱动ADS7825。 实际验证，没问题-verilog hdl ADS7825 EP2C5T144
Develop-a-Verilog-module-for-a-2
- 基于QUARTUS9.1 的 程序 例程用于 CYCLONE II ep2c5t144 开发板测试-guangyuQUARTUS de licheng yongyuceshi CYCLONE II ep2c5t144 board
PWM_OUT
- 这是一个EP2C5T144的FPGA产生PWM信号到LED上控制LED的亮度的源程序，可以通过按键来改变占空比，带有电路图:)-This is a PWM signal to control the brightness of the LED to the LED source a EP2C5T144 the FPGA button to change the duty cycle, with the circuit diagram :
DDS
- 这是一个用EP2C5T144的FPGA制作的DDS信号发生器，输出信号波形可变，幅度可调，缺点是信号频率略低，带有电路图-This is a used EP2C5T144 FPGA produced DDS signal generator, the output signal waveform variable adjustable amplitude, the disadvantage is that the signal freq