搜索资源列表
vhdlcdes6
- FPGA/CPLD集成开发环境ISE使用详解实例－6-FPGA/CPLD integrated development environment IDE ISE example-6
Quartus-guide
- quartus的教程，是初学者使用FPGA的好老师，介绍了quartus的使用方法，并且有例子-quartus curricula, the use of FPGA beginners is a good teacher. quartus introduced the use, and is an example
cmos_FPGA
- 采用Verilog语言,实现了FPGA控制视频芯片的数据采集,并将数据按帧存储起来-Verilog language, to achieve control of the FPGA chip video data acquisition, Data will be stored up by fr a me
cf_fft_2048v
- 基于FPGA的2048点FFT的verilog实现的源代码。-FPGA-based 2048-point FFT verilog the source code.
VGA_control_verilogHDL
- 基于FPGA的VGA控制器设计。对外支持普通VGA接口，以600×480的分辨率和60Hz扫描率为例。对内支持NIOSII软核接口。-FPGA-based VGA controller design. External support ordinary VGA interface, to 600 × 480 resolution and scan rate of 60Hz as an example. Internal support
FPGA_CPLDdigitalcircuitexperience
- FPGA和CPLD设计时的经验和大家一共分享，开发FPGA时很好的资料-FPGA and CPLD design experience and we were sharing, FPGA development when good information
FSM_design_guide
- 在FPGA设计时常用到FSM设计,本文很好地指导如何设计FSM-in FPGA design often used FSM design, a good guide is how to design FSM
8bitCRC
- 多项式为x^8+x^5+x^4+1的CRC（循环冗余校验码）的FPGA设计。-polynomial x 8 x ^ x ^ ^ 5 4 1 CRC (cyclic redundancy check code) FPGA design.
wave_generator
- 51单片机控制FPGA，通过DDS方式合成波形的发生器控制程序-51 MCU control FPGA, DDS waveform synthesis of the generator control procedures
DDS_generator
- DDS锯齿波发生器： 开发平台：maxplus＋FPGA 功能： 输出X路扫屏锯齿波。频率可用键盘精确控制，设置多个挡位；可水平移动波形；-DDS sawtooth generator : Development Platform : maxplus+ FPGA functions : So output X Lu Ping Sawtooth. Keyboard can be used precision frequency c
jiyuFPGAdePCIzongxianjiekousheji
- 基于FPGA的PCI总线接口的设计方案 ~！-FPGA-based PCI bus interface design ~!
FPGA-CPLD_DesignTool
- FPGA-CPLD_DesignTool,事例程序陆续上传请需要的朋友下载-FPGA-CPLD_DesignTool, examples please upload procedures need to have a friend download
FPGA-CPLD_DesignTool(example3-4)
- FPGA-CPLD_DesignTool,事例程序3-4陆续上传请需要的朋友下载-FPGA-CPLD_DesignTool. 3-4 examples procedures have requested upload download a friend in need
FPGA-CPLD_DesignTool(7)
- FPGA-CPLD_DesignTool(example7),需要的朋友可以下载-FPGA-CPLD_DesignTool (example7) a friend in need can be downloaded
FPGA-CPLD_DesignTool(8-9-10)
- FPGA-CPLD_DesignTool(8-9-10)源代码请需要的朋友下载-FPGA-CPLD_DesignTool (8-9-10) requested the source code to their peers in need Friends Download
Low-power_system_design-Considering_system_reliabi
- 一篇关于低功耗FPGA的博士论文，主要考虑了设计的可实现性和安全性-a low-power FPGA on the doctoral thesis that the main consideration in the design can be realized and safety
Xilinxconfigure
- Xilin公司的FPGA配置说明书，pdf格式-Xilin the FPGA configuration brochures, pdf format
FPGA_H_264AVC
- 在FPGA上实现H_264AVC视频编码标准资料-on FPGA achieve H_264AVC video coding standard information
sd_ctl_nios
- 基于FPGA的SD控制器实现.目前实现读操作功能,可作参考.-FPGA-based SD controller. Nowadays Reading the functions, reference can be made.
digit_clock
- FPGA设计的时钟！很特别，本人的第一次，还望各位探讨！-FPGA design the clock! Very special, the first time I also hope to explore!