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FM1702_1704_1705(CN)
- FM1702_1704_1705中文说明书 --非常详细的RC500或FM1702的中文数据手册 1. 概述. FM1702/1704/1705 是复旦微电子股份有限公司设计的基于ISO14443 标准的. 非接触卡读卡机专用芯片，采用0.6 微米CMOS EEPROM 工艺，支持13.56MHz. 频率下的typeA 非接触通信协议，支持多种加密算法，兼容Philips 的MF RC500 读卡机芯片.-FM1702_1704
leon3-altera-ep2s60-ddr
- This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be r
200706
- 本系统是一个频率的发射,数控调频发射器可在80.0 MHZ至109.9MHZ范围内任意设置发射频率，可预置13个频道
311-45469-PIC18F8723
- Ideal for large low power (nanoWatt) and connectivity applications that benefit from the availability of four serial ports: double synchronous serial ports (I² C™ and SPI™ ) and double asynchronous (LIN cap
RSA_signature
- RSA Encryption and Decryption using Matlab by Thunyawat Rajatasereekul and Voranon Kiettrsalpipop ECE575, Winter 2002, Oregon State University Prof, Cetin Keya Koc The program set contains thirteen files liste
SG3_200610_541_ISO-IEC_18000-6_v4.0
- RFID标准：iso18000-6（英文版）。 Information technology — Radio-frequency identification for item management — Part 6: Parameters for air interface communications at 860 MHz to 960 MHz
mp3
- The first task at hand is to set up the endpoints appropriately for this example. The following code switches the CPU clock speed to 48 MHz (since at power-on default it is 12 MHz), and sets up EP2 as a Bulk OUT endpoi
xapp134_vhdl
- The SDRAM controller is designed for the Virtex V300bg432-6. It s simulated with Micron SDRAM models. The design is verified with timing constraints at 115 MHZ.
320smpl1
- All programs were tested using a breadboard containing a DS80C320, 32K Program memory, 32K Data memory, two 8-segment bar graph LEDs/drivers, and an 11.0592 MHz crystal. The four 8-segment bar graph LEDs/drivers
CC1100
- CC1100是一种低成本真正单片的UHF收发器，为低功耗无线应用而设计。电路主要设定为在315、433、868和915MHz的ISM（工业，科学和医学）和SRD（短距离设备）频率波段，也可以容易地设置为300-348 MHz、400-464 MHz和800-928 MHz的其他频率。 RF收发器集成了一个高度可配置的调制解调器。这个调制解调器支持不同的调制格式，其数据传输率可达500kbps。通过开启集成在调制解调器上的前向误差校正
vb
- A digital fi‘equeney meter designed with FPGA development software Q-~us 11 is introduced．The 1 Hz—l MHz input measured pulse signals of the digital ii‘equency meter can be used for measuring frequency，period，pulse width
swra054
- AN039 -- Using CC1100CC1150 in European 433868 MHz bands
ADC
- This example describes how to use the ADC and DMA to transfer continuously converted data from ADC to a data buffer. The ADC is configured to converts continuously ADC channel14. Each time an end of conversion occ
RFID_EPC_Class1_Gen2_UHF_RFID_Protocol_for_Communi
- 中国EPC标准草案（基本上是EPC C1G2的中文翻译） 射频识别协议- 第1类第2代UHF RFID 860兆赫-960兆赫通讯协议 EPC™ Radio-Frequency Identity Protocols Class-1 Generation-2 UHF RFID Protocol for Communications at 860 MHz – 960 MHz
PTR2000
- PTR2000 的Pin6 ( PWR) 与AT89C51 的P1. 0 相连,PTR2000 的Pin7 (TXEN) 与AT89C51 的P1. 1 相连,CS 直接接地,利用工作频道1 ,即433. 92 MHz. 通过汇编语言对其编程.
T6963C-10
- LCM（RT-240128TA）显示程序 */ LCM 控制芯片 T6963C 带32KRAM MCU 型号: STC 89C52RD2 时钟频率: 11.0592 MHz 接口方式: 直接接口（总线方式
ATmega128(L)_cn
- 高性能、低功耗的 AVR® 8 位微处理器 • 先进的 RISC 结构 – 133 条指令 – 大多数可以在一个时钟周期内完成 – 32 x 8 通用工作寄存器 + 外设控制寄存器 – 全静态工作 – 工作于16 MHz 时性能高达16 MIPS
sd_IP
- SD card controller can just read data using 1 bit SD mode. I have written this core for NIOS2 CPU, Cyclone, but I think it can works with other FPGA or CPLD. Better case for this core is SD clock = 20 MHz and CPU c
GAINS-3
- GINAS modules to enable the low-power wireless sensor networks measurement system. Available in 868/916 MHz, 433 MHz,
GAINS-TEST1
- GINSmodules to enable the low-power wireless sensor networks measurement system. Available in 868/916 MHz, 433 MHz, GINS PROGRAME