搜索资源列表
61EDA_C52
- 标准SDR SDRAM控制器参考设计，有助于大家学习和参考
sdr
- 软件无线电中信号调制方式的识别——用人工神经网络的方法
altera
- FPGA研讨会的一些问题集！-some of the problems set!
Altera AHDL语言设计的PCI总线Core
- Altera AHDL语言设计的PCI总线-AHDL Altera's PCI bus design
SDR
- 赛德尔迭代法解方程组-Seidel iterative method for solving equations
sdraw
- 用ＳＤＫ写的画图软件．可画线，方，圆．点．等-using the SDK to write drawing software. Can painting lines, side and round. Point. So. .
ref-sdr-sdram-vhdl
- DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
发布15个Altera的IP的源码
- ALTERA的FPGA的IP核的源代码,为使用ALTERA的FPGA的相关设计提供参考.-Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.
ALTERA器件选型手册
- ALTERA器件选型手册 对初学者学习FPGA比较有用-Altera device manual for beginners to learn more useful FPGA
sdr_model
- M-file for simulating a QPSK transmitter by modulating with a pseudo random bit stream. A serial to parallel conversion of the pseudo random bit stream is performed with mapping of two bits per symbol. A cosine and sine
SDROFDM
- 基于软件无线电设计思想的OFDM系统设计与实现-based design software radio OFDM System Design and Implementation
FPGASDR
- 详细论述FPGA在软件无线电技术实现系统中的应用-detail FPGA in software radio technology system of
sdram_memdma
- ADI公司BF533读取SDRAM数据，汇编语言-ADI BF533 SDRAM read data, the compilation of language
core_44b0
- 详细介绍了S3C44B0CPU的引脚情况 还有内部存储器包括SDRAM和NOR FLASH的连线-S3C44B0CPU details of the situation is the internal pin including SDRAM memory and N FLASH OR connectivity
very-good-ok-ref-ddr-sdram-verilog
- Sdr SDRAM控制器参考设计,很好的-Sdr SDRAM controller reference design, very good
Init_SDRAM
- AT91RM9200 SDRAM初始化脚本文件，ADS1.2使用，SDRAM为三星K4S641632E，使用脚本后可以将代码直接通过JTAG下载到SDRAM中，在SDRAM中进行仿真调试，启动文件不要进行修改直接可以使用，同时打开CP15的指令缓存和数据缓存-AT91RM9200 SDRAM initialization scr ipt file, ADS1.2 use, Samsung K4S641632E of SDRAM, Aft
LPC3180_SDRAM_Init
- ARM9内核的philip公司的LPC3180初始化SDRAM的驱动代码-ARM9 core philip
altera_nios_conductor
- altera nios从入门到精通.pdf,对研究NIOS的人员很有帮助-altera nios from entry to the master. pdf, the study of NIOS staff very helpful
HIGHSPEEDDIGITALDOWNFREQUENCYTRANSFORMbasedonnewty
- 介绍了一种基于新型FPGA的高速数字下变频的实现方法 它充分利用数字下变频的优化算法以及FPGA领域的新技术去除由于数据速率过高而造成的各种瓶颈,极大地减少了计算量 和FPGA片内资源的消耗.-Introduce a new type of FPGA-based high-speed digital down conversion method which realize the full advantage of digital