搜索资源列表
Black-gold-Sparten6_VerilogV1.6
- 黑金Sparten6开发板Verilog教程V1.6，黑金FPGA教程，多种实例讲解，非常经典实用。-Black Gold Spartan6 board Verilog tutorials V1.6, black gold FPGA course, a variety of examples to explain, very classic and practical.
LCD_SDRAM
- spartan6 LCD SDRAM测试程序，方便好用，可直接使用-spartan6 LCD SDRAM test code
sp6_BoardTest
- 针对xilinx spartan6芯片做的测试板测试用例-xilinx FPGA product SPARTAN6 test example
MB_Demo
- 基于Spartan6的软核处理器Microblaze的一个简单例子，方便初学者快速掌握MicroBlaze-Based on a simple example of Spartan 6 Microblaze soft core processor, and easy for beginners to quickly master the MicroBlaze
MB_Interrupt
- 基于Spartan6的软核MicroBlaze的外部中断，通过按键的按下来触发中断，并通过串口来吧中断次数输出。-Based on Spartan external soft-core MicroBlaze 6 of interruption by pressing down the button triggers an interrupt, and come through the serial port interrupt freq
MB_DDR3
- 利用Spartan6的软核MicroBlaze来测试读写DDR3的历程。利用官方提供的函数以及实时查看内存来验证DDR3的读写是否成功-Use of Spartan soft-core MicroBlaze 6 to test reading and writing DDR3 course. The use of official functions and real-time view to validate DDR3 memory
DDR3_128M16bit_2Port64bit
- Xilinx spartan6 DDR3驱动，编程语言Verilog，基于MCB硬核。-Xilinx spartan6 DDR3 driver based on MCB ip core,coding by verilog.
Microblaze_Spartan6
- 这是利用Spartan6搭建的MicroBlaze，完成为了众多功能，上层是利用c语言开发，利用底层硬件层提供的API接口。-This is the use Spartan6 built MicroBlaze, in order to complete the many functions of the upper layer is to use c language development, the use of the API in
AES-S6MB-LX9-G-Schematics-RevC-Schematics
- AES design on LX-9 spartan6
tdc-core-master
- TDC的HDL实现代码，在SPARTAN6平台上验证过。(The HDL implementation of TDC function, verified in spartan 6 platform.)
uart_test
- 描述了利用spatran6系列的FPGA，进行串行异步通信的uart串口实现代码(Describes the use of spatran6 series of FPGA, serial asynchronous communication uart serial port to achieve the code)
spi_MasterSlaver
- 实现3种模式SPI主从模块功能设计，数据位宽8bit，最大SPI时钟频率支持112MHz，采用FSM设计实现。经本人亲测可用，使用于Spartan6——45T系列芯片；(To achieve three modes SPI master and slave module function design, data bit width 8bit, the maximum SPI clock frequency support 112MHz
ddr3_128
- DDR3 读写操作，使用spartan6平台验证。(DDR3 read and write operations,the use of spartan6 platform validation.)
FPGA串口
- FPGA串口测试代码，适用于ISE软件，spartan6下XC6SLX16
divider
- a vhdl code for divide operation in fpga spartan6
usb_rd_buffer
- FPGA（SPARTAN6）通过USB协议与开发板上的USB芯片进行数据读写测试，在上位机上可以看到USB发来的数据，也可以通过修改VERILOG代码完成数据的接收(FPGA (SPARTAN6) can read and write data through the USB chip on the development board through the USB protocol. The data sent by USB can
CH14_RGMII_UDP_TEST
- 用xilinx的SPARTAN6 实现的UDP，可通过PC机网络抓包工具进行发送和接收，增加了网络视频传输的接口，具有很好的参考价值(With the Xilinx implementation of the SPARTAN6 UDP, can be sent and received through PC network capture tools, increase the network video transmission in
Greedy_snake
- 贪吃蛇，用SPARTAN6系列FPGA实现的贪吃蛇例程，用ISE14.7打开即可，Verilog语言(greedy_snake.rar The realization of the snake in the Verilog language Using ISE14.7)
spartan6_GTP
- 基于xilinx公司的SPARTAN6系列芯片的高速全双工串行收发器(high-speed transceiver based on spartan 6 of Xilinx PFGA)
control_tube
- 定义LX6系列针脚，并实现计时器，最大可以数到60min，局限于只有四个tube(Define the LX6 series pin and implement the timer,)