搜索资源列表
bidir
- verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
bidir
- verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.
bidir
- code for bidirectionl buffer
bidir
- 用FPGA实现双向的引脚的定义和使用，了解bidirectional的含义和使用方法-Two-way with FPGA pin definition and use to understand the meaning and use bidirectional
rfc5015.txt
- This document discusses Bidirectional PIM (BIDIR-PIM), a variant of PIM Sparse-Mode that builds bidirectional shared trees connecting multicast sources and receivers. Bidirectional trees are built using a fail-safe
DE2_115_PS2_DEMO
- Simple PS/2 controller in Verilog HDL to demonstrate bidir communication between PC/2 controller and PC mouse slave device