搜索资源列表
ref-ddr-sdram-verilog.zip
- sdram的verilog的源码实现
ref-sdr-sdram-vhdl
- DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
ddr_verilog_xilinx
- DDR(双速率)SDRAM控制器参考设计,xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx
ddr
- DDR solution for problem in NPC contest
Atmel-SAMA5D3x-DDR-Application-note
- Atmel SAMA5D3X DDR,DDR2,LPDDR2应用说明.-Atmel Microcontroller SAMA5D3x DDR2 LPDDR2 Application note
DDR
- ddr memory design basics intro
DDR_MO
- 使用verilog语言实现简单的DDR SDRAM控制器(Using Verilog language to achieve a simple DDR SDRAM controller)
ddr_sdram
- 包含ddr_sdr_conf_pkg.vhd,reset.vhd,ddr_dcm.vhd,user_if.vhd,ddr_sdram.vhd,Mt46v16m16.vhd以及仿真TB文件;设计采用Virtex ii系列芯片,DDR_SDRAM型号为Mt46v16m16,可用于进行DDR控制的初步学习使用;通过细致了解并进行逻辑控制,可深入理解DDR芯片内部构造; 支持133MHz系统时钟频率,突发长度为2,可进行读、写、NOP、激活、
DDR设计系列
- 很好的PC内存条设计资料,如果你是内存设计的初学者,这里的资料很适合你,值得参考(Very good PC memory design information, if you are a beginner of memory design, the information here is very suitable for you, it is worth reference)
DDR的原理和时序
- 嵌入式DDR时序方面的书籍,对调试时序有帮助(The principle and timing.Rar of DDR)
DDR
- 低功耗DDR3芯片手册,DDR2芯片手册(Low power DDR3 chip Handbook,DDR2 chip Handbook)
DDR_Stress_Tester_V1.0.3
- imx6 ddr tool v2, ddr_stress_tester_v1.0.3
ddr3_mig8
- fpga实现ddr数据收发测试,完整的工程,下载解压后,即可正确运行,已多次验证无误(FPGA DDR data receive and receive test, complete engineering, download and unzip, can run correctly, has been verified many times)
ddr_stress_tester_v2.70
- DDR 压力测试 ,针对imx6平台的DDR压力测试工具(DDR test for imx6 platform)
9G45DDRtest
- 裸板基于9G45的DDR测试样例,可用户判断DDR的空间大小,读写数据完整性,硬件片选是否正确,多颗DDR芯片硬件组合是否正确,硬件线路是否完整,DDR线路时序是否正常。(DDR bare board test case based on 9G45, the user can determine the DDR size of the space, read and write data integrity, hardware sele
xst_vlog_bl2cl25
- DDR 原厂IP核开源代码控制器vrilogHDL代码(xilinx ddr control xst)
KeyStone_Memory_for_4G
- TI 6678DSP 4G ddr 简单测试,便以懒人使用。(TI 6678DSP 4G DDR is a simple test, it will be used by lazy people.)
FPGA读取sd卡音频到DDR
- Xilinx FPGA读取sd卡音频到DDR,vivado实现
iMX DDR calibration
- DDr calibration process described