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hspice_toolbox.tar
- generate eye diagram from spice sim result
debussy_tutorial
- 从事过fpga设计的朋友一定对于代码的仿真调试非常的头大,还好现在有了debussy 能为我们节省大量的时间,附件就是介绍debussy 的使用教程,希望对大家有帮助-Engaged in a certain friend fpga design simulation for debugging the code the first large, debussy better now for us to save a lot of ti
novas-verdi-debussy-user-manual
- springsoft 公司的 verdi (仅支持linux unix) 是debbusy的升级版 ,eda 工具,自动批量差错 -verdi(only on linux unix) , such as debbusy,eda tools , debug verilog vhdl code。 trace reg drive and load
arm7
- 基于arm-v4架构,兼容ARM7指令集。附录有说明文档,希望对大家有用。可以在windows上使用Debussy+modelsim的组合开发,是Verilog写的-Based on arm-v4 architecture, compatible with ARM7 instruction set. Appendix have documentation, we hope to be useful
dac7554
- dac7554控制模块,包含简单的testbench和debussy的仿真波形文件。-dac7554 control module contains a simple simulation testbench and debussy waveform files.
modelsimPdebussy-batch-processing
- 内容包括采用Windows批处理方式高效执行Verilog仿真验证的方法,采用Modelsim+debussy联合仿真,里面包含一个加法器实例,批处理文件,仿真指令等。-Included with Windows batch efficient implementation of Verilog simulation method, using Modelsim+debussy co-simulation, which contains
spi_cbb
- 基于FPGA设计,verilog语言变成的,SPI通用接口模块,顶层已封装成类似标准的FIFO接口;提供仿真文件;仿真器为modelsim10.0c,波形观察debussy。-Based on the FPGA design, Verilog language into a, SPI universal interface module, the top has been packaged into a FIFO interface s