搜索资源列表
S3Demo
- Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The sev
quantizer
- 这个DCT的源代码Core was tested on Digilent S3 board with Spartan Xc3S1000 FPGA
verilog-clock
- 用verilog编写的多功能数字钟--Multifunctional digital clock written in verilog.
S3Demo
- Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The sev
quantizer
- 这个DCT的源代码Core was tested on Digilent S3 board with Spartan Xc3S1000 FPGA-The DCT of source code Core was tested on Digilent S3 board with Spartan Xc3S1000 FPGA
pong
- Pong is a mixed schematic, VHDL, Verilog project featuring the PS2 and VGA monitor connections of the Xilinx\Digilent Spartan-3 demo board.
CPLD_Implementation_of_a_Lucky_Dip_Machine
- 摸奖桶程序设计 也就是乐透彩票模拟程序 程序为verilogHDL描述 详细请看英文描述-Digital Electronic Design Automation Workshop on Rapid Prototyping using a CPLD Lucky Dip Machine using the Digilent X-Board
vga
- VGA interface using Spartan3E board from DIGILENT.Labview .vi
4BCD
- 4个7段lcd同时显示的程序，已经在digilent的nexy2板上通过验证，非常好用易懂，适合初学者学习-display 4 leds
calc_v2_s3eboard
- Simple calculator EDK design implemented on Digilent S3EBOARD using Microblaze soft-core CPU. Input: PS/2 keyboard, output: VGA monitor.
I2C_vdec1
- Comunicacion I2c para el video decodificador VDEC1 de Digilent
vacantfiles
- VGA source code for Digilent Inc board Basys
vacantfiles2
- digilent vga board files
Tutorial09_Clock
- 基于Spartan-3e的数码管显示时钟程序的设计，整个流程讲解详细。-A very important concept in digital design is that of the clock. A clock is used to synchronize systems in digital logic, and provides a convenient way to keep track of real time. Anot
Oscilloscope
- The design is designed partly in VHDL, partly in schematic drawings and targets a Xilinx Spartan-2E FPGA. However, since the design was tailored specifically for the aforementioned boards it is highly unlikely that it ca
w11_latest[1].tar
- 该项目包含一个完整的PDP - 11系统：一个内存管理单元七十○分之十一的CPU，但没有浮点单元，一组基本的单总线外围设备（DL11，LP11，PC11，RK11/RK05），以及最后但并非最不重要的一用于SRAM和PSRAM高速缓存和内存控制器。该设计的FPGA验证，目前运行Digilent的S3BOARD和NEXYS2板和靴子第5版的UNIX和2.11BSD UNIX操作系统。-The project contains a comp
CEREBOT32MX4-LED-Demo
- Required Hardware • Digilent Cerebot 32MX4 • USB A to Micro-B Cable • Digilent Pmod8LD (optional)-Required Hardware • Digilent Cerebot 32MX4 • USB A to Micro-B Cable • Digilen
Intro_to_Digital_Design-Digilent-Verilog_Online.r
- a course of design of vhdl-a course of design of vhdl
BasysDemo_ISEproject
- Digilent公司basys开发板的全套开发例程，代码，可用于仿真，下载。包括了基本的fpga外设单元。-Digilent development board' s basys complete development routines, the code can be used for simulation, download. Fpga peripherals, including the basic unit.
Nexys2_sch
- digilent最新fpga开发板nexys原理图资料，非常详细，规范。-digilent latest fpga development board nexys schematic information, very detailed, specification.