搜索资源列表
div2
- 大数除法的实现算法，不仅能实现两个大数的除法，而且能实现浮点数之间以及浮点数与整数之间的除法-majority of the division algorithm, is not only able to make large numbers of division two, but to achieve a float and between integer and floating point divider between the
fft
- 16卫浮点FFT算法的VHDL实现，有测试文件。-16 floating-point FFT algorithm Wei VHDL realize, have the test paper.
ieee754c
- 浮点和16进制互相转换软件。用于单片机调试，浮点-定点转换，我在开发中经常用到。 很不错的软件。-Hexadecimal floating-point and 16 co-conversion software. For single-chip debug, floating-point- fixed-point conversion, I frequently used in the development. Very good
AccelDSP
- AccelDSP Synthesis Tool Floating-Point to Fixed-Point Conversion of MATLAB Algorithms Targeting FPGAs
fsqr
- 功能：浮点数开平方（快速逼近算法） 入口条件：操作数在[R0]中。 出口信息：OV=0时，平方根仍在[R0]中，OV=1时，负数开平方出错。 影响资源：PSW、A、B、R2～R7 堆栈需求： ２字节 -Features: Floating-point square root (fast approximation algorithm) entrance conditions: operand in [R0] in.
VHDLfolat
- 开发环境是FPGA开发工具，主要讲解用CPLD/FPGA实现浮点数的运算-Development environment is the FPGA development tools, primarily on the use of CPLD/FPGA to achieve floating-point arithmetic
JLab
- 实现浮点数加，减，乘，除，求余，自加，自减等基本算术运算-The realization of floating-point add, subtract, multiply, divide, and more than that, since Canada, since by the basic arithmetic operations
float
- 我们组成原理课上的一个作业，定点与浮点运算间的转换，功能实现了，但还不是很完美，以后再慢慢改-We formed a principle of class operations, fixed-point floating-point operations and inter-conversion functions, but is not very perfect, later changed slowly
dingtofu
- 小数在计算机内有两种表现形式定点数和浮点数。在定点机中，由于小数点的位置固定不变，以此当机器处理的数不是纯小数或纯整数的时候，必须乘上一个比例因子，否则会产生“溢出”。而实际上计算机处理的数不一定是纯小数或纯整数，而且有些数据的数值范围相差很大，不能直接用定点小数或定点整数表示，必须用浮点数来表示。浮点数的表示精度要比定点数高的多。要求用定点运算来仿真浮点运算，用定点数运算的思想去实现浮点数的运算。-Decimals in the co
32bits_float_muliplier
- 32位浮点乘法器的设计，讲的挺好的，供参考啊-32-bit floating-point multiplier design, speak very good, and for reference ah
setup_DSP2833x_v103
- TMS320F28F335浮点DSP的FLASH擦写安装文件，可以直接安装应用，这个也是国外频譜公司提供的原版安装文件-TMS320F28F335 floating-point DSP-FLASH erasable installation files, you can directly install the application, the spectrum is provided by the company abroad, th
cf_fp_mul
- 浮点型的乘法器,采用VHDL语言描述浮点型的乘法器,文中包含测试文件-Floating-point type multiplier using VHDL language to describe the type floating-point multiplier, the text included in the test document
fpu
- 使用VHDL语言描述的单精度浮点处理器。源代码来自国外网站。可实现单精度浮点数的加减乘运算。-Described in VHDL language using single-precision floating-point processor. Web site source code from abroad. Can be achieved single precision floating point addition and su
ADD_Float_IEEE754
- IEEE754 floating point adder
MUL_Float_IEEE_754
- IEEE754 floating point mul
1
- 高效结构的多输入浮点乘法器在FPGA上的实现-Efficient structure of multi-input floating-point multiplier in FPGA Implementation
floatmul
- 采用VERILOG 语言进行设计 实现32位浮点数乘法运算 结果已经验证过 放心使用-Verilog design language used to achieve 32-bit floating-point multiplication results have been verified ease of use
Float
- 用VHDL语言在CPLD／FPGA上实现浮点运算，资源多多共享,不亦乐乎!-VHDL language used in the CPLD/FPGA to achieve floating-point operations, resources, a lot of sharing, joy!
DSP2833x_examples
- TI公司TMS320F2883x浮点DSP的详细应用例程，希望对您有帮助！~-TI floating-point DSP company TMS320F2883x detailed application of routine, I hope for your help! ~
FFT
- 同样是浮点型的fft算法一样为vc开发的-The same floating-point fft-based algorithm as developed for the vc