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mux21a
- 二选一多路选择开关，实现对信号的采集，分类。-Second, the election more than one way selector switch, to achieve signal acquisition, classification.
mux21a
- 2选1多路选择器的VHDL完整描述，即可以直接综合出实现相应功能的逻辑电路及其功能器件。图6-1是此描述对应的逻辑图或者器件图-2 election more than one MUX complete descr iption of the VHDL, which can be directly integrated to achieve the corresponding function logic devices and the
mux21a
- 在VHDL结构体中用于描述逻辑功能和电路结构的语句分为顺序语句和并行语句两部分，顺序语句的执行方式十分类似于普通软件语言的程序执行方式，都是按照语句的前后排列方式顺序执行的。-VHDL structure in the body used to describe the logic function and circuit structure of the order of statements and expressions are
cpsk
- 用VHDL硬件语言对BPSK调制解调系统进行编写，仿真通过，源代码-VHDL hardware language using BPSK modulation and demodulation system, the preparation, simulation adopted, the source code
mux21a
- 应用QuartusII 完成基本组合电路设计-The application QuartusII completion of basic combinational circuit design
mux21a
- 程序和原理图都有，实现与门的功能，测试已通过。-Program and schematic diagram, implementation and the function of the door, the test has passed.
mux21a
- 基于FPGA的用VHdl硬件语言实现的双二选一编码器。-Choose an encoder FPGA-based hardware with VHdl language of bis.
mux21a
- 二选一，用于FPGA编程初学阶段，简单例子，使用时解压即可，Quartus II 9.0 (32-Bit)的应用(Two choose one, for FPGA programming beginner stage, a simple example, the use of decompression can be, Quartus II 9 (32-Bit) applications)