搜索资源列表
09_ethernet_100
- Artix7 XC7A100T芯片控制百兆PHY的二层通信,源代码(Two layer communication Artix7 XC7A100T chip control PHY megabytes, source code)
以太网进阶培训Part1_STM32以太网外设
- 利用STM32的10x系列,MAC连接外部的PHY,进行以太网的设计,实现MCU的网络控制(Base on the STM32 do the ethernet design)
MinhThai Bootstrap
- .....\...\ll.h .....\...\mac-sensor-timers.cc .....\...\mac-sensor-timers.h .....\...\mac-sensor.cc .....\...\mac-sensor.h .....\...\mac.cc .....\...\phy.cc .....\...\phy.h .....\...\wireless-phy.cc ...
STM332-F107lwip
- 本程序是基于STM32F107芯片,DM9161为以太网PHY芯片的Lwip裸板移植,借助于网络调试助手可以实现客户端与服务端之间的通信。其以STM32为服务端,电脑为客户端,STM32默认IP为192.168.0.30,端口为23,调试的时候若电脑开有无线网记得把无线网给关掉,不然调试助手连接不上客户端,IP地址可根据实际需要进行修改,一定要记得使stm32客户端的IP与电脑IP处于同一网段,只有在同一网段才能保证两者之间的通信,代码
dlan-greenphy-sdk-master
- This project contains the SDK for the devolo dLAN Green PHY module.
esp32_bluetooth_architecture_cn
- ESP32 蓝牙介绍。蓝牙可分为控制器? (Controller) 和主机 (Host) 两大部分:控制器包括了PHY、Baseband、Link Controller、Link Manager、Device Manager、HCI 等模块,用于硬件接口管理理、链路路管理理等等;主机则包括了了 L2CAP、SMP、SDP、ATT、GATT、GAP 以及各种规范,构建了了向应?用层提供接口的基础,方便便应?用层对蓝牙系统的访问。主机可以与
DBSTAR_RGMII
- Verilog实现的RGMII和GMII接口转接,适合适配不同PHY芯片接口使用(Verilog implementation of RGMII and GMII interface transfer)
phy-mv-usb
- PXA OTG state machine for Linux v2.13.6.
DHCP&TCP&UDP(keep alive & PHY)
- 单片机驱动W5500单片机源码,完成网路数据传输(SCM W5500 microcontroller source code for reference)
PHY
- OAI中openair1下物理层代码,源自openairinterface,可搭建整个通信平台(The physical layer code under openair1 in OAI is derived from openairinterface, which can build the entire communication platform.)
utmi
- 介绍USB PHY接口中的UTMI接口, 对使用Verilog进行USB接口编程具有帮助。(This paper introduces UTMI interface in USB PHY interface. It is helpful for programming USB interface with Verilog.)
88E1512_Maxell
- 88e1512 PHY芯片资料,为硬件设计及软件使用提供指导(88e1512 PHY chip information, provide guidance for hardware design and software use)
rgmii_image
- 通过RGMII协议驱动的PHY芯片完成千兆以太网收发,包括ARP响应(With RGMII driving PHY IC to finish the internet communication)
DJ080IA-11A
- network phy chip, data sheet, manual
10/100/1000以太网源码
- 与AHB总线相接,拥有DMA,支持10/100/1000的PHY接口,verilog
W5500 Datasheet
- The W5500 chip is a Hardwired TCP/IP embedded Ethernet controller that provides easier Internet connection to embedded systems. W5500 enables users to have the Internet connectivity in their applications just by using