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DDR_SDRAM_Controller
- DDR RAM控制器的VHDL源码，实现平台是Lattice FPGA，功能验证通过-DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
IDT7132
- AT89C52扩展外部双口RAM(IDT7132)，在Keil C51环境下测试，和一般的RAM使用方法相当！用串口调试助手观看测试结果-AT89C52 expand external dual-port RAM (IDT7132) Keil C51 in the test environment, and the general use of RAM is! Help with serial debugging watched tes
dualportRAM
- 双端口RAM的VHDL语言实现。完全在CPLD芯片上测试通过。可以实现对存储器读操作的同时对另外一个空间写操作-dual-port RAM VHDL. Totally CPLD chip test. Memory can be achieved right time to operate while the other was a space operation
DDS_sin
- 用VHDL语言实现DDS直接数字频率合成器的设计，采用正弦RAM表，可实现频率可控的正弦数字信号，编译、仿真通过。-VHDL DDS Direct Digital Frequency Synthesizer Design using sinusoidal RAM table achieve controllable frequency sinusoidal digital signal, compile, through simulat
RAM_VHDL_34
- RAM之VHDL描述 RAM之VHDL描述-RAM's VHDL descr iption RAM's VHDL descr iption RAM's VH DL described in VHDL's RAM
my_fifo_vhdl
- XILINX的FPGA实现的双口ram源码，可作为dsp\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
Sobel--Image_Filter_An_Image_filtering_VHDL
- Sobel--Image Filter (I). An Image filtering is made over data loaded into the on board RAM and presented on a VGA monitor.zip-Sobel-- Image Filter (I). An Image filteri Vi is made over the data loaded into RAM on board a
DDK_BCHKD_Custom_Events
- RAM Disk Driver with custom BoundsChecker events This sample illustrates how to add custom BoundsChecker events to a DDK driver. It links to the kchecker library and has several BOUNDSCHECKER() calls in it.
vhdl_sw_lr
- 我自己写的vhdl程序，内有画图器，ram 和控制ram。还有test bentch。-I wrote it myself vhdl procedures, which are drawing device, and control of ram ram. There bentch test.
memtest
- RAM的硬件测试程序,经本人测试已经没有问题-RAM hardware test procedures, as I have no problem testing
Flashram
- FLASH RAM test program on EVC environment
danpianjiC51
- 下载说明： 本光盘的所有代码均在Keil C51 7.0以上版本编译通过。读者的电脑只需要 能够运行Windows 98 以上版本的操作系统、并能够安装Keil C51 7.0以上版本 的软件即可。 读者可以到Keil公司的主页（http://www.keil.com/demo/）免费下载 Keil C51试用版软件。但试用版的Keil C51 软件有2KB RAM的限制，部分程序
C51lcd
- SED1335驱动320x240图形液晶驱动演示程序 320x240液晶模块配用sed1335驱动接口板，sed1335驱动接口板上配用32K ram -SED1335 driver 320x240 graphics LCD driver demo program with 320x240 LCD Module with SED1335 driver interface board, sed1335-driven interfa
double_RAM
- 在modolsim平台下仿真完成了一个双端口RAM的实现，希望有用。-Simulation platform in modolsim completed a dual-port RAM realize the hope that useful.
AVR
- AVR的RAM扩展方法,在设计ARM时很有帮助哦-AVR
altera_ram
- 本程序对如何使用altera系列芯片片上ram进行实例演示，采用Verilog HDL语言编写，并使用modelsim与quartus联合进行功能仿真。本原码是红色逻辑开发板的试验程序，值得一看。-This procedure of how to use the altera series chip-chip ram for example demonstration, using Verilog HDL language, and u
RAMtest
- LPC2292 RAM TEST SAMPLE
317s64
- S64是atmel公司的一块ARM7处理器，价格低廉，16k RAM 64K flash，带USB接口，是ARM入门的好选择，这个是它的电路图，protel的-S64 is a piece of Atmel
ICL7135
- 双口RAM程序实例-Dual-port RAM instance
128×16ram
- VHDL程序设计的RAM存储器，双端口，128×16比特-VHDL programming RAM memory, dual-port, 128 × 16 bits