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Fingerprint_Identify
- 本项目名称是：基于FPGA的指纹识别模块设计。 主要内容为：本模块采用xilinx公司的Spartan 3E系列XC3S500E 型FPGA作为核心控制芯片，通过富士通公司的MFS300滑动式电容指纹传感器对指纹图象进行提取，然后对提取的指纹图像进行灰度滤波、图像增强、二值化、二值去噪、细化等预处理，得到清晰的指纹图象，再从清晰的指纹图象中提取指纹特征点，存入外部FLASH作为建档模板。指纹比对时，采用同样的方法获得清晰的指纹图
Spartan3AFPGAStarterKitBoardUserGuide
- Spartan-3A FPGA Starter Kit Board User Guide-Spartan-3A FPGA Starter Kit Board User Guide.pdf
Spartan3AStarterKitSchematics
- Spartan 3AStarter Kit Schematics-Spartan-3A Starter Kit Schematics
4559939-VGA-Video-Signal-Generation
- source code VGA for Xilinx FPGA Spartan 3E
eth_phy10
- an ethernet physique sender. it s implemented with spartan 3E starter kit
COMPRESSION
- Simple LZW image compression implemented on Spartan-3e starter kit using Xilinx9.2 and Modelsim for testbench simulation.
rafal2
- VHDL project for FPGA SPartan 3 using IseWebpack 10.1. This is an implemetation of FSM for testing 7 segment with dot point 4 digit LED display.
DDS
- A simple VHDL implementation of a DDS on Xilinx Spartan 3E Starter Kit development board
spartan_alu_8_bit
- Verilog based 8 bit ALU module, implemented on Spartan 3E FPGA.
BGA1
- 本应用指南针对 FT256 1 mm BGA 封装的 Spartan™ -3E FPGA，讨论了低成本、四至六层、 大批量印刷电路板 (PCB) 的布局问题，同时探讨高速信号和信号完整性 (SI) 因素对低层数 PCB 布局的影响。-Application Guide for the FT256 1 mm BGA package, Spartan ™-3E FPGA, the discussion of th
PCICOREGUIDE
- 本指南讲述支持的基于 Virtex™ 和 Spartan™ 架构的 32 位和 64 位核的设计流程，并且介绍 Cadence® IUS v5.8 中的示例设计。-This guide based on the support of the Virtex ™ and Spartan ™ architecture 32-bit and 64-core design process, a
stopwatch
- The program is written in verilog to accomplish functions of a stopwatch. It can be implemented in Xilinx FPGA spartan 3 board.
xapp341
- verilog uart for spartan 3 fpga, its great
MY_DDS
- 基于spartan-3e开发板的dds，包括串行通信的dac代码-direct digital frequency synthesis based on spartan-3e kitboard
Xil3SD1800A_MIG_simplifiedUI_vlog_v92
- verilog 实现的spartan 3A dsp start kit DDR2 SDRAM 控制器-verilog achieved spartan 3A dsp start kit DDR2 SDRAM controller
DDS_FINAL
- My project is on Direct Digital Synthesiser using Verilog HDL.This project is doing by me on july 2009 in summer training at NIT Kurukshetra, India. This DDS system generate the square wave, Triangular wave,Sine wave a
xapp058
- xilinx Spartan-3E FPGA的MCU配置源代码-xilinx Spartan-3E FPGA to configure the source code of the MCU
Vga
- The code is used to interface PC monitor with Spartan 3E for the display. if you run the program on spartan 3 you would be able to see different test pattern on the monitor screen
testLED
- Spartan 3E 开发板上LED灯循环闪烁-Spartan 3E development board flashing LED lights cycle
Simple_LCD
- 简单的Spartan 3e 上面的LCD控制程序-A simple Spartan 3e above LCD control procedures