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Watch_dog
- 对判断程序非正常退出或非正常处于死机状态进行检测，如果发现则重启程序。-judgment procedures to withdraw from the non-normal or normal lockups at the state testing, if they were to resume proceedings.
watch_dog-2440.tar
- 三星s3c2440cpu的内部watchdog源代码，经本人修改，可以模块加载。-s3c2440cpu Samsung's internal watchdog source code, I revised Modules can be loaded.
watch_dog
- 自己做的一个看门狗的程序，希望对大家有所帮助。
watch2
- vhdl实现watchdog，在逻辑中可以加入本模块，实现看门狗。-VHDL achieve watchdog, the logic of the modules can be added to achieve watchdog.
Watch_dog
- 对判断程序非正常退出或非正常处于死机状态进行检测，如果发现则重启程序。-judgment procedures to withdraw from the non-normal or normal lockups at the state testing, if they were to resume proceedings.
watch_dog
- 自己做的一个看门狗的程序，希望对大家有所帮助。-A watchdog to do their own procedures, and they hope to be helpful to everyone.
watch_dog
- 看门狗的verilog源代码，项目的一部分，绝对正确，测试通过。-Watchdog of the Verilog source code, part of the project, is absolutely correct, the test.
watch_dog_rtl_source
- Watchdog timer verilog RTL code
watch_dog
- 键控看门狗程序： 在16383个机器周期内必须至少喂狗一次。 当晶振为11.0592M时在17毫秒内需喂狗一次。 激活看门狗后,喂狗,P2引脚上的LED闪烁发光 激活看门狗后,如果不喂狗,则复位 P0引脚上的LED闪烁发光-Keying watchdog process: In the 16383 machine cycle must be at least feed the dog once. When t
watch_dog
- avr晶片看門狗應用範例atmeg48 atmega-avr-chip watchdog application example atmeg48 atmega88
Watch_DOG
- 该程序介绍了如何初始化 MB90540 系列的监视狗等-The procedure describes how to initialize the MB90540 series, so watch dog
LEDDAZHUANPAN
- CHIP SN8P2604 ------------------------------------------------------------ 功能描叙：开机为全灭 I)KEY按下。A区工作：A区灯加速后减速最后停止，再在原地闪 0.3SH+0.3SL，B区为不亮 II)KEY按下。B区工作：B区灯加速后减速最后停止，如果B区最后停点与A区同，A区与B区同时亮灭 （A区B区灯的颜色和停止点都为
watch_dog
- 看门狗程序，实践中比较好用，虽没有多少技术含量，但可以让初学者参考一下。挺不错的。-Watchdog program, the practice is relatively easy to use, although not much technical content, but allows beginners reference. Pretty good.
KAFEI
- 2501的一个学习例程，有参考价值-CHIP SN8P2501b Select the CHIP //{{SONIX_CODE_OPTION .Code_Option Noise_Filter Enable Disable .Code_Option Watch_Dog Enable Disable Disable Watchdog .Code_Option Fcpu #3 Fcpu =
watch_dog
- 看门狗程序设计，使用verilog HDL语言编写-Watchdog program design, using verilog HDL language
watch_dog
- 看门狗的verilog源代码，项目的一部分，绝对正确，测试通过。-Watchdog of the Verilog source code, part of the project, is absolutely correct, the test.
watch_dog
- 基于EPM1270F256实现的4路看门狗控制逻辑，实现了滤波、延时、复位功能。-Based on EPM1270F256 4 road guard dog control logic, to realize the function of filtering, time delay and reset.
watch_dog
- verilog实现watch dog看门狗功能。(watch Implement watch dog function.)