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dianziceliang
- 基于labview设计的虚拟示波器函数发生器逻辑分析仪等-Labview-based design of the virtual oscilloscope function generator logic analyzer
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- Proteus仿真ARM7实验手册 仿真软件 Proteus是英国Labcenter electronics公司的EDA工具软件,Proteus已有十五年的历史,在全球广泛使用,除了其具有和其它EDA工具一样的原理布图、PCB自动或人工布线及电路仿真的功能外,其革命性的功能是,他的电路仿真是互动的,针对微处理器的应用,可以直接在基于原理图的虚拟原型上编程,并实现软件源码级的实时调试,如有显示及输出,还能看到运行后输入输出的效果,配合
LogiAnalyzer(2.4)
- 2.4"tft触摸屏 stm32f103编程 原是为一个逻辑分析仪的,后觉屏太小改大的了,代码就都重写,作为半成品,可作为此屏的编程参照。-2.4 " TFT touch screen stm32f103 programming was originally for a logic analyzer, and feel the screen is too small to change the large, code rewri
LogicAnalyser
- 利用示波器显示逻辑分析仪数据,通过输出XY信号,使,示波器显示8路信号-Use the oscilloscope to display the logic analyzer data, through the output XY signal oscilloscope display eight channels
luojifenxiyi
- 利用示波器显示逻辑分析仪数据,通过输出XY信号,使示波器显示8路信号-Use the oscilloscope to display the logic analyzer data, through the output XY signal oscilloscope display eight channels
TimerMat
- Cortex-M3 ARM NXP LPC1768定时器功能。定时器2匹配输出功能。用示波器或逻辑分析仪查看是否输出方波。keil环境。-Cortex-M3 ARM NXP LPC1768 timer function. Timer 2 match output function. See if the output square wave with an oscilloscope or logic analyzer. keil env
BitToBin
- 本C程序的目的是将硬件工程师测试电路板并从逻辑分析仪获取位流,将位流转换为标准Hex内容的Bin文件-The purpose of the C program is the hardware engineers to test the circuit board from the logic analyzer for bit stream, the bit stream is converted to standard Hex Bin
S6_VGA
- 1。源文件保存在src目录,QII的工程文件保存在Proj目录; 2。程序实现的功能是在VGA显示器上显示彩色条纹,共8种颜色, 可以使用嵌入式逻辑分析仪观测信号; 3。modelsim仿真文件在proj--simulation--modelsim中-1. The source file is saved in the src directory QII project file is saved in the direc
S3_WAVE
- 1、本实验模拟正弦函数发生器 2、使用逻辑分析仪查看波形 3、/proj/simulation目录中可以在modelsim中仿真-1, the experimental simulation of the sine function generator, logic analyzer view waveform 3/proj/simulation directory in modelsim simulation
EX86C
- 关于微型计算机接口的资料。8253定时器扩展电路 8259中断扩展电路 8237 DMA扩展电路 地址译码输出模块 逻辑分析仪数字采样和可编程数字脉冲信号输出模块 虚拟示波器-USE [master] GO /****** Object: Database [FilmHireSystem] scr ipt Date: 06/05/2012 22:13:15******/ CREATE DATABA
fenxiyi
- 这主要是基于VHDL简易逻辑分析仪,fpga设计里面各个模块的源程序-This is mainly based on VHDL simple logic analyzer fpga design inside the module source
signal_tap
- 对学习quartusii有很大的帮助,对逻辑分析仪的使用有更多的掌握-A great help for learning quartusii more mastery of the use of logic analyzer
Saleae-Analyzer-Source-1.1.14
- 逻辑分析仪源码,大家多多参考,很有价值意义的。-Logic analyzer source code, we reference a lot of valuable significance.
analyzer
- 16通道逻辑分析仪PCB图纸,很好的东东,欢迎大家下载-16-channel logic analyzer PCB drawings, good stuff
DEMO_V
- 基于fpga的多通道逻辑分析仪设计的整个工程,可以直接使用-Design of multi-channel logic analyzer based on FPGA throughout the project, can be used directly
sine-function-generator-by-VHDL
- 1、本实验模拟正弦函数发生器 2、使用逻辑分析仪查看波形 3、/proj/simulation目录中可以在modelsim中仿真-1, this experiment simulated sine function generator 2, the use of logic analyzer to check waveform 3,/proj/simulation directory in the modelsim
Logic8_V4
- 8位逻辑分析仪的原理pcb及源代码,可支持上位机软件-The principle of the eight logic analyzer pcb and source code, supports PC software
the-usbee-logic-analyzer-program
- usbee逻辑分析仪程序 上位机程序 CY7C68013A烧写固件 Logic SDK Users Guide-usbee logic analyzer program host computer program the CY7C68013A programming firmware Logic SDK Users Guide
USB2.0-Principle--Development-CD
- USB2.0原理与工程开发光盘 USB接口波形发生器 USB2.0接口逻辑分析仪 USB2.0接口频谱分析仪-USB2.0 Principle and Project Development CD-ROM USB interface waveform generator USB 2.0 interface logic analyzer USB 2.0 interface spectrum analyzer
stm32-Encoder
- 利用stm32两路pwm输出作为编码器接口两路输入信号,计数结果可用串口显示,pwm信号可用逻辑分析仪显示-Use-STM32 two PWM output as encoder interface two input signals, count results available serial port PWM signal can be used logic analyzer