搜索资源列表
qdq_new
- 采用Verilog HDL设计,在掌宇智能开发板上得到实现 根据抢答器的原理，整个电路可划分为三部分：采样电路、门控电路和译码电路- Uses Verilog the HDL design, obtains the realization basis on the palm space intelligence development board to snatch the answering principle, the en
first4
- 4人抢答器的硬件描述语言设计，可以下载测试与仿真，通过EDA开发系统进行调试-four Responder hardware descr iption language design, test and can be downloaded simulation, EDA through the development of system debugging
baluqiangdaqi
- 八路抢答器，通过数码管显示出，选手好码，程序带有仿真，很适合初学者学习。欢迎下载-Answer eight-way, and through digital tube shows a good player code, the procedure with a simulation, it is suitable for beginners to learn. Welcome to download
FPGA
- 基于VHDL语言 智力抢答器的设计 本人的课程设计-Based on the VHDL language design intellectual Answer my curriculum design
qiangdaqi
- 抢答器。可以直接用QUARTUS2运行，解压无需密码。以前我们做实验的时候用的这个-Answer devices. Can be directly used QUARTUS2 running, unzip without a password. Previous experiments when we used to do this
vhdl-sirenqiangdaqi
- VHDL的四人抢答器，希望对大家有所帮助啊，-Answer four VHDL, and want to help everybody ah,