查看会员资料
- 用户积分：16 分
- Email：
- Icq/MSN：@yung_hucci
- 电话号码：
- Homepage：
- 会员简介：Nothing!
最新会员发布资源
sum in vhdl
- Sum module for Cyclone IV
Adder of three numbers VHDL
- Adder of three numbers module in vhdl
Counter up and down
- vhdl code + testbench of up and down counter based on t-trigger
decoder
- 4 bit input decoder binary to binary-decimal with testbench files
multiplier
- multiplier with HEX-LED indication. numbers from 0 to 9. tested on Altera DE2 and simulation.
multiplier fpga
- Multiplication of two numbers from 0 to 9. The first number is displayed on the HEX7 indicator, increases with the KEY3 button, and decreases with the KEY2 button, the second is displayed on the HEX5 indicator, increases with the KEY1 button an