十进制计数器既可采用QuartusII的宏元件74160，也可用VHDL语言设计。在项目编译仿真成功后，将设计的十进制计数器电路设置成可调用的元件cont10_v.sym，用于4位十进制计数器的顶层设计。-Decimal counter can use QuartusII macro components 74160, also available VHDL language design. After the success of the project compiled simulation