原创，帧同步器的Verilog代码，在FPGA上验证实现过，无误。作为通信系统帧传输的仿真，有限状态机同步态和失步态的切换仿真。-Original Verilog code for fr a me synchronization, verify the implementation on the FPGA, and correct. fr a me transmission as the communication system simulation, finite state machine