这个实验可以说是verilog入门最基础的实验了，我们不做太多的理论分析，实践是硬道理。 当CPLD的I/O（ FM）为低电平时，三极管导通， 蜂鸣器发声。-This experiment can be said to be the most basic experiments verilog entry, and we do not do a lot of theoretical analysis, practice is the last word. When the CPLD' s