文件名称:My_Clock
介绍说明－－下载内容均来自于网络，请自行研究使用
发个我的第一个VHDL代码，秒表。可暂停继续.清0。-My first one made a VHDL code, and a stopwatch. Continue to be suspended. Qing 0.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
My_Clock\BCD_7SEG.vhd
........\clk_1Hz.map.rpt
........\clk_1Hz.flow.rpt
........\BCD_7SEG.vhd.bak
........\CTR_MOD_10.vhd.bak
........\CTR_MOD_10.vhd
........\CTR_MOD_6.vhd
........\CTR_MOD_2.vhd
........\MyClock.bdf
........\clk_1Hz.bsf
........\BCD_7SEG.bsf
........\CTR_MOD_10.bsf
........\CTR_MOD_6.bsf
........\CTR_MOD_2.bsf
........\CTR_MOD_6.vhd.bak
........\CTR_MOD_2.vhd.bak
........\shift.vhd
........\shift.vhd.bak
........\shift.bsf
........\shift_.vhd
........\shift_.vhd.bak
........\shift_en.bsf
........\clk_1Hz.pin
........\clk_1Hz.fit.smsg
........\clk_1Hz.fit.summary
........\clk_1Hz.fit.rpt
........\clk_1Hz.sof
........\clk_1Hz.pof
........\clk_1Hz.asm.rpt
........\clk_1Hz.tan.summary
........\clk_1Hz.tan.rpt
........\clk_1Hz.dpf
........\clk_1Hz.vhd.bak
........\clk_1Hz.vhd
........\counter.bdf
........\shift_8bit.bsf
........\shift_1B.bsf
........\conter6.bsf
........\shift_1byte.bsf
........\conter10.bsf
........\conter2.bsf
........\bar.bsf
........\clk_1Hz.cdf
........\clk_1Hz.qws
........\clk_1Hz.qpf
........\clk_1Hz.qsf
........\clk_1Hz.map.summary
........\clk_1Hz.done
........\db\clk_1Hz.db_info
........\..\clk_1Hz.map.qmsg
........\..\clk_1Hz.tis_db_list.ddb
........\..\prev_cmp_clk_1Hz.map.qmsg
........\..\prev_cmp_clk_1Hz.qmsg
........\..\clk_1Hz.cbx.xml
........\..\clk_1Hz.hif
........\..\clk_1Hz.fit.qmsg
........\..\clk_1Hz.cmp.cdb
........\..\clk_1Hz.hier_info
........\..\clk_1Hz.rtlv_sg_swap.cdb
........\..\clk_1Hz.map_bb.logdb
........\..\prev_cmp_clk_1Hz.fit.qmsg
........\..\prev_cmp_clk_1Hz.asm.qmsg
........\..\prev_cmp_clk_1Hz.tan.qmsg
........\..\clk_1Hz.cmp.logdb
........\..\clk_1Hz.psp
........\..\clk_1Hz.dbp
........\..\clk_1Hz.pss
........\..\clk_1Hz.asm.qmsg
........\..\clk_1Hz.tan.qmsg
........\..\clk_1Hz.eco.cdb
........\..\clk_1Hz.syn_hier_info
........\..\clk_1Hz.cmp2.ddb
........\..\clk_1Hz.sgdiff.hdb
........\..\clk_1Hz.map.ecobp
........\..\clk_1Hz.rtlv_sg.cdb
........\..\clk_1Hz.cmp.ecobp
........\..\clk_1Hz.cmp_bb.logdb
........\..\clk_1Hz.sgdiff.cdb
........\..\clk_1Hz.rtlv.hdb
........\..\clk_1Hz.cmp_bb.rcf
........\..\clk_1Hz.pre_map.hdb
........\..\clk_1Hz.pre_map.cdb
........\..\clk_1Hz.sld_design_entry_dsc.sci
........\..\clk_1Hz.cmp.bpm
........\..\clk_1Hz.map_bb.cdb
........\..\clk_1Hz.map_bb.hdb
........\..\clk_1Hz.map.logdb
........\..\clk_1Hz.map.cdb
........\..\clk_1Hz.map.hdb
........\..\clk_1Hz.map.bpm
........\..\clk_1Hz.asm_labs.ddb
........\..\clk_1Hz.signalprobe.cdb
........\..\clk_1Hz.cmp.tdb
........\..\clk_1Hz.cmp.hdb
........\..\clk_1Hz.sld_design_entry.sci
........\..\clk_1Hz.cmp_bb.cdb
........\..\clk_1Hz.cmp_bb.hdb
........\..\clk_1Hz.cmp.rdb
........\..\clk_1Hz.cmp0.ddb
........\db
........\clk_1Hz.map.rpt
........\clk_1Hz.flow.rpt
........\BCD_7SEG.vhd.bak
........\CTR_MOD_10.vhd.bak
........\CTR_MOD_10.vhd
........\CTR_MOD_6.vhd
........\CTR_MOD_2.vhd
........\MyClock.bdf
........\clk_1Hz.bsf
........\BCD_7SEG.bsf
........\CTR_MOD_10.bsf
........\CTR_MOD_6.bsf
........\CTR_MOD_2.bsf
........\CTR_MOD_6.vhd.bak
........\CTR_MOD_2.vhd.bak
........\shift.vhd
........\shift.vhd.bak
........\shift.bsf
........\shift_.vhd
........\shift_.vhd.bak
........\shift_en.bsf
........\clk_1Hz.pin
........\clk_1Hz.fit.smsg
........\clk_1Hz.fit.summary
........\clk_1Hz.fit.rpt
........\clk_1Hz.sof
........\clk_1Hz.pof
........\clk_1Hz.asm.rpt
........\clk_1Hz.tan.summary
........\clk_1Hz.tan.rpt
........\clk_1Hz.dpf
........\clk_1Hz.vhd.bak
........\clk_1Hz.vhd
........\counter.bdf
........\shift_8bit.bsf
........\shift_1B.bsf
........\conter6.bsf
........\shift_1byte.bsf
........\conter10.bsf
........\conter2.bsf
........\bar.bsf
........\clk_1Hz.cdf
........\clk_1Hz.qws
........\clk_1Hz.qpf
........\clk_1Hz.qsf
........\clk_1Hz.map.summary
........\clk_1Hz.done
........\db\clk_1Hz.db_info
........\..\clk_1Hz.map.qmsg
........\..\clk_1Hz.tis_db_list.ddb
........\..\prev_cmp_clk_1Hz.map.qmsg
........\..\prev_cmp_clk_1Hz.qmsg
........\..\clk_1Hz.cbx.xml
........\..\clk_1Hz.hif
........\..\clk_1Hz.fit.qmsg
........\..\clk_1Hz.cmp.cdb
........\..\clk_1Hz.hier_info
........\..\clk_1Hz.rtlv_sg_swap.cdb
........\..\clk_1Hz.map_bb.logdb
........\..\prev_cmp_clk_1Hz.fit.qmsg
........\..\prev_cmp_clk_1Hz.asm.qmsg
........\..\prev_cmp_clk_1Hz.tan.qmsg
........\..\clk_1Hz.cmp.logdb
........\..\clk_1Hz.psp
........\..\clk_1Hz.dbp
........\..\clk_1Hz.pss
........\..\clk_1Hz.asm.qmsg
........\..\clk_1Hz.tan.qmsg
........\..\clk_1Hz.eco.cdb
........\..\clk_1Hz.syn_hier_info
........\..\clk_1Hz.cmp2.ddb
........\..\clk_1Hz.sgdiff.hdb
........\..\clk_1Hz.map.ecobp
........\..\clk_1Hz.rtlv_sg.cdb
........\..\clk_1Hz.cmp.ecobp
........\..\clk_1Hz.cmp_bb.logdb
........\..\clk_1Hz.sgdiff.cdb
........\..\clk_1Hz.rtlv.hdb
........\..\clk_1Hz.cmp_bb.rcf
........\..\clk_1Hz.pre_map.hdb
........\..\clk_1Hz.pre_map.cdb
........\..\clk_1Hz.sld_design_entry_dsc.sci
........\..\clk_1Hz.cmp.bpm
........\..\clk_1Hz.map_bb.cdb
........\..\clk_1Hz.map_bb.hdb
........\..\clk_1Hz.map.logdb
........\..\clk_1Hz.map.cdb
........\..\clk_1Hz.map.hdb
........\..\clk_1Hz.map.bpm
........\..\clk_1Hz.asm_labs.ddb
........\..\clk_1Hz.signalprobe.cdb
........\..\clk_1Hz.cmp.tdb
........\..\clk_1Hz.cmp.hdb
........\..\clk_1Hz.sld_design_entry.sci
........\..\clk_1Hz.cmp_bb.cdb
........\..\clk_1Hz.cmp_bb.hdb
........\..\clk_1Hz.cmp.rdb
........\..\clk_1Hz.cmp0.ddb
........\db