[其他嵌入式/单片机内容] SPI_MASTER

说明：this a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is used for spi master-this is a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is used for spi master
<valiantyasir> 在 2026-01-12 上传 | 大小：2kb | 下载：0

[系统编程] GetWord.ocx(VB)

说明：专业屏幕取词引擎GetWord.ocx的简单使用范例（VB），为VB入门编程人员准备。GetWord.ocx为在网上下载的破解版本，版权归作者所有。-Professional Capture Characters from Screen engine GetWord.ocx a simple example of the use (VB), entry for VB programmers to prepare. GetWord.ocx crack in the downloaded versi
<余余> 在 2026-01-12 上传 | 大小：384kb | 下载：1

[其他小程序] str2hex

说明：字符转１６进制数据,可以根据具体需要修改。-16 hexadecimal characters in the data transfer can be modified according to specific needs.
<啊蓝> 在 2026-01-12 上传 | 大小：1kb | 下载：0

[OpenGL] vCOpenGL

说明：opengl 与c联合绘制程序 可以根据用户的需要绘制-opengl and c co-drawing program can be drawn according to the needs of users
<liping> 在 2026-01-12 上传 | 大小：6.98mb | 下载：0

[VHDL编程] SequentialCircuitDesign_withVerilog

说明：Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
<Nguyen Chi Nhan> 在 2026-01-12 上传 | 大小：292kb | 下载：0

[游戏] skyblue_Snake

说明：贪吃蛇小游戏的源代码，基于MFC编程，在VC6.0中测试完全好使，-Snake game source code, based on MFC programming, so that in the VC6.0 tested fully,
<西欧> 在 2026-01-12 上传 | 大小：286kb | 下载：0

[VHDL编程] tut_quartus_intro_verilog

说明：Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
<Nguyen Chi Nhan> 在 2026-01-12 上传 | 大小：800kb | 下载：0

[VHDL编程] tut_timing_verilog

说明：Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
<Nguyen Chi Nhan> 在 2026-01-12 上传 | 大小：361kb | 下载：0

[其他嵌入式/单片机内容] LCDdisplay

说明：this a file used for the spi communication between spi1 and spi2 of dspic30f6014. this file is the lcd file to display the communication between two spis.-this is a file used for the spi communication between spi1 and spi2 of dspic30f6014. this f
<valiantyasir> 在 2026-01-12 上传 | 大小：2kb | 下载：0

[VHDL编程] Verilog_VHDL_Golden_Reference_Guide

说明：Verilog source code is usually typed into one or more text files on a computer. Those text files are then submitted to a Verilog compiler or interpreter which builds the data files necessary for simulation or synthesis. Sometimes simulation imm
<Nguyen Chi Nhan> 在 2026-01-12 上传 | 大小：272kb | 下载：0

[Internet/网络编程] Router

说明：C#路由器功能模拟,使用.net类进行路由功能模拟，-route
<陈> 在 2026-01-12 上传 | 大小：472kb | 下载：0

[游戏] BoxMan

说明：推箱子小游戏的源代码，基于MFC编程，在VC6.0中测试完全好使，-Sokoban game' s source code, based on MFC programming, so that in the VC6.0 tested fully,
<西欧> 在 2026-01-12 上传 | 大小：1.29mb | 下载：0