资源列表
[VHDL编程] behavioral-hmwk5
说明:Design a synchronous circuit which monitors a 3-bit code as the input. If the code has a constant value in four consecutive clock cycles, a flag is activated.<mafa87> 在 2025-11-24 上传 | 大小:1kb | 下载:0
[VHDL编程] code-hmwk7
说明:Make the required flag signals using the input clock signal (clk) and input flag (TKN). Whenever the TKN signal is activated, a sequence of activation of flag signals should be performed based on the timing diagram<mafa87> 在 2025-11-24 上传 | 大小:1kb | 下载:0
[VHDL编程] hmwk3try.vhd
说明:Design a circuit that take three N-Bit binary numbers as inputs and calculate the average of the largest number and the smallest number as the output. Note that the length of the input numbers should be defined variable<mafa87> 在 2025-11-24 上传 | 大小:1kb | 下载:0
[微处理器(ARM/PowerPC等)] uartlite_double
说明:基于ZYNQ开发平台VIVADO开发环境调用PL双UART_LITE源程序-Based on the ZYNQ development platform VIVADO development environment Call PL double UART_LITE source<陈诗剑> 在 2025-11-24 上传 | 大小:1kb | 下载:0
[微处理器(ARM/PowerPC等)] EEPROM
说明:基于TMS320F28335的EEprom程序-TMS320F28335 based on the EEPROM program<呢> 在 2025-11-24 上传 | 大小:1kb | 下载:0