资源列表
[J2ME] drawregiondemo
说明:j2me drawing image in a selected region<med> 在 2025-09-21 上传 | 大小:1kb | 下载:0
[J2ME] doublebufferdemo
说明:j2me double buffring immage -j2me double buffring immage<med> 在 2025-09-21 上传 | 大小:1kb | 下载:0
[Internet/网络编程] send
说明:在windows中,向一个IP发送一段数据,这是在windows中网络编程的最简单例子。-In the windows, the IP sent to a section of data, which is in the windows network programming in the most simple example.<80x86du> 在 2025-09-21 上传 | 大小:1kb | 下载:0
[VHDL编程] FIR
说明:The first three examples illustrate the difference between RTL FSMD model (Finite State Machine with Datapath buildin) and RTL FSM + DataPath model. From view of RT level design, each digital design consists of a Control Unit (FSM) and a Datapath. Th<dhanagopal> 在 2025-09-21 上传 | 大小:1kb | 下载:0
[VHDL编程] memory
说明:the memory program are used to design the fpga application for in very log module<dhanagopal> 在 2025-09-21 上传 | 大小:1kb | 下载:0
[VHDL编程] statemechine
说明:We are using parameters is the test bench and passing them to the state machine using parameter passing We are using tasks to control the flow of the testbench We are using hierarchical naming to access the state variable in the state machine f<dhanagopal> 在 2025-09-21 上传 | 大小:1kb | 下载:0
[VHDL编程] uart
说明:the uart model is used to design the synthies and beherival model in verilog fpga<dhanagopal> 在 2025-09-21 上传 | 大小:1kb | 下载:0
[VHDL编程] clock1
说明:多功能数字钟实现闹铃,整点报时,校时,仿广播电台报时功能-multifuntional digital clock written in verilog<sliversnake> 在 2025-09-21 上传 | 大小:1kb | 下载:0
[嵌入式Linux] ttyMAX_read
说明:this for tty max chip read through external uart-this is for tty max chip read through external uart<nitin> 在 2025-09-21 上传 | 大小:1kb | 下载:0