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[VHDL编程fifo

说明:fifo存储器的功能与实现,以及时序功能仿真-fifo memory
<卢晋> 在 2025-06-24 上传 | 大小:1.63mb | 下载:0

[VHDL编程SCM-LED-Digital-electric-clock

说明:基于51单片机的4位LED数字电子钟程序代码。-Based on 51 SCM of four LED digital electric clock program code.
<戴霄鹏> 在 2025-06-24 上传 | 大小:5kb | 下载:0

[VHDL编程121

说明:设计FPGA-based design of an arbitrary divider values-FPGA-based design of an arbitrary divider values
<or> 在 2025-06-24 上传 | 大小:230kb | 下载:0

[VHDL编程clock_timer

说明:数字电子钟实现了真实的时间计数,通过这个工程的训练,能更好的了解Quartus II数字电路开发的过程。--Digital electronic clock to achieve a real time count, the training through this project, to better understand the Quartus II development process of digital circuits.-
<臧文渊> 在 2025-06-24 上传 | 大小:49kb | 下载:0

[VHDL编程eetop.cn_m8051ew.tar

说明:M8051EW文档及源代码程序,很难搞到的!-M8051EW documentation and source code, hard to come by it!
<大斌> 在 2025-06-24 上传 | 大小:2.64mb | 下载:1

[VHDL编程xapp247-(2)

说明:the document is related to video transmission and serial digirtal interface (SDI) standard which describes how to transport standard-definition digital video serially over coax cable
<geunie> 在 2025-06-24 上传 | 大小:162kb | 下载:0

[VHDL编程xapp248

说明:the document is related to video transmission and serial digirtal interface (SDI) standard which describes how to transport standard-definition digital video serially over coax cable
<geunie> 在 2025-06-24 上传 | 大小:187kb | 下载:0

[VHDL编程xapp250-(2)

说明:the document is related to video transmission and serial digirtal interface (SDI) standard which describes how to transport standard-definition digital video serially over coax cable
<geunie> 在 2025-06-24 上传 | 大小:121kb | 下载:0

[VHDL编程xapp288_SDI-decoder

说明:the document is related to video transmission and serial digirtal interface (SDI) standard which describes how to transport standard-definition digital video serially over coax cable
<geunie> 在 2025-06-24 上传 | 大小:105kb | 下载:0

[VHDL编程xapp298_SDI-encoder

说明:the document is related to video transmission and serial digirtal interface (SDI) standard which describes how to transport standard-definition digital video serially over coax cable
<geunie> 在 2025-06-24 上传 | 大小:112kb | 下载:0

[VHDL编程E_Memory

说明:memory code with 64 bytes of capacity in vhdl
<n> 在 2025-06-24 上传 | 大小:1kb | 下载:0

[VHDL编程Xilinx_FPGA_Design

说明:这个文档主要帮助大家熟悉利用ISE进行Xilinx FPGA代码开发的流程。-This document is focused on helping people familiar with the use of ISE for Xilinx FPGA code development process.
<何立志> 在 2025-06-24 上传 | 大小:1.66mb | 下载:0
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