[VHDL编程] cf_fp_mul_latest.tar

说明：CF Floating Point Multiplier
<aliakbar> 在 2025-06-09 上传 | 大小：573kb | 下载：0

[VHDL编程] AsicVhdlBasicLab_Vhdl

说明：Asic Vhdl Basic Ans Lab_Vhdl Examples_microprocessor (VHDL)desingn
<aliakbar> 在 2025-06-09 上传 | 大小：4.22mb | 下载：0

[VHDL编程] vhdl-pipeline-mips_latest.tar

说明：pipeline mips in vhdl
<aliakbar> 在 2025-06-09 上传 | 大小：1.08mb | 下载：0

[VHDL编程] rfid_latest.tar

说明：rfid tag and reader with VHDL for FPGA
<aliakbar> 在 2025-06-09 上传 | 大小：1.5mb | 下载：0

[VHDL编程] cf_fft_latest.tar

说明：The FFT architecture is pipelined on a rank basis each rank has its own butterfly and ranks are isolated from each other using memory interleavers. This FFT can perform calculations on continuous streaming data (one data set right after anot
<amin> 在 2025-06-09 上传 | 大小：2.98mb | 下载：0

[VHDL编程] system05_latest.tar

说明：6805 compatible CPU Core 6805 compatible core - 4 x 8 bit Parallel I/O ports - Dual 8 bit Timer - MiniUART compatible with 6850 ACIA. - Runs with an E clock of 12.5MHz and system clock of 25MHz
<amin> 在 2025-06-09 上传 | 大小：29kb | 下载：0

[VHDL编程] fpu100_latest.tar

说明：This a 32-bit floating point unit (FPU), which I developed in a project within the Vienna University of Technology. It can do arithmetic operations on floating point numbers. The FPU complies fully with the IEEE 754 Standard-This is a 32-bit floating
<amin> 在 2025-06-09 上传 | 大小：1.88mb | 下载：0

[VHDL编程] zorro_to_wishbone_bridge_latest.tar

说明：This project intends to create a bridge between Wishbone and the Amiga Zorro II and Zorro III busses. As in the Amiga 3000/4000 computer families, it is intended to support both the Zorro II and Zorro III protocols at the same time on the same bus.
<amin> 在 2025-06-09 上传 | 大小：10kb | 下载：0

[VHDL编程] i2cslave

说明：此代码是I2C Slave的Verilog源代码,已经经过上板调试，没问题。-This code is the I2C Slave of Verilog source code, has been on the board debugging, no problem.
<Evan Xie> 在 2025-06-09 上传 | 大小：1.2mb | 下载：0

[VHDL编程] PS2

说明：此代码是PS2键盘的Verilog程序，键盘的字符可显示在LCD 1602上，经上板调试程序是可行的-This code is a PS2 keyboard Verilog program, keyboard characters can be displayed on the LCD 1602, after the board debug process is feasible
<Evan Xie> 在 2025-06-09 上传 | 大小：9kb | 下载：0

[VHDL编程] YCbCr2RGB_O

说明：此代码是把YUV转成RGB的Verilog程序，多谢下载-This code is to convert RGB to YUV Verilog program, thank you download
<Evan Xie> 在 2025-06-09 上传 | 大小：1kb | 下载：0

[VHDL编程] sdram

说明：文件中包含Sdram的Verilog程序以及很全的Sdram的资料-Sdram the Verilog file contains procedures and information are all of Sdram
<Evan Xie> 在 2025-06-09 上传 | 大小：3.55mb | 下载：0