资源列表
[VHDL编程] Clock
说明:多功能时钟,以调试通过,可以直接用,非常适用于FPGA初学者。-Multi-clock, in order to debug through, and can be very useful for beginners in FPGA.<HarrisHuang> 在 2025-06-18 上传 | 大小:638kb | 下载:1
[VHDL编程] 8051vhdl_ip_core
说明:8051完整ip内核Vhdl源代码程序。-8051 ip core Vhdl complete source code program<zhouxiao> 在 2025-06-18 上传 | 大小:638kb | 下载:0
[VHDL编程] IICComponent
说明:IIC的vhdl实现,用ISE12.1建的项目,读取eeprom的接口代码-using FPGA to communicate with the EEPROM through IIC connector<一笑> 在 2025-06-18 上传 | 大小:638kb | 下载:0
[VHDL编程] codes
说明:various mac unit designs are looked into taking consideration of aspects such as low power and high speed. higher throughput is being aimed at-various mac unit designs are looked into taking consideration of aspects such as low power and high speed.<Deepak Srinivasan> 在 2025-06-18 上传 | 大小:637kb | 下载:0
[VHDL编程] AM_restored
说明:DDS正弦信号生成,可以用于生成正弦信号,实现调制。-DDS sine signal generator can be used to generate sine signal modulation.<刘文> 在 2025-06-18 上传 | 大小:637kb | 下载:0