资源列表
[VHDL编程] cnt8bc
说明:8位加减带异步复位计数器,使用双向输入管脚- Design an 8-bit up and down synchronous counter in VHDL with the following features: The same ports are used for signals to be inputted and outputted. The ports are bi-directionally buffered. The counter is with an asynchro<fjmwu> 在 2025-06-18 上传 | 大小:1kb | 下载:0
[VHDL编程] FSMwithOutputsDecode
说明:有限状态机FSM with Outputs Decoded in Parallel Output Register-FSM with Outputs Decoded in Parallel Output Register<fjmwu> 在 2025-06-18 上传 | 大小:1kb | 下载:0
[VHDL编程] FSMwithOutputsEncodedwithinStateBits
说明:FSM有限状态机FSM with Outputs Encoded within State Bits-FSM with Outputs Encoded within State Bits<fjmwu> 在 2025-06-18 上传 | 大小:1kb | 下载:0
[VHDL编程] XilinxISEDesignSuite12.1
说明:Xilinx ISE Design Suite 12.1 cd key<grs> 在 2025-06-18 上传 | 大小:1kb | 下载:0
[VHDL编程] 24add
说明:24进制it describe how to design a add24-it describe how to design a add24<lishaozhan> 在 2025-06-18 上传 | 大小:1kb | 下载:0
[VHDL编程] lcd_master_0607
说明:关于THS12864液晶的驱动电路verilog代码设计,支持Avalon总线-LCD driver circuit on the THS12864 verilog code design, support Avalon bus<jacky> 在 2025-06-18 上传 | 大小:1kb | 下载:0