资源列表
[VHDL编程] TrackingPresentation_jon
说明:presentation a low cost video tracking algorithm implemented on an Altera DE2 board with Cyclone II processor. System uses a VGA controller and several SG-DMA s-presentation on a low cost video tracking algorithm implemented on an Altera DE2 board wi<stjohn> 在 2025-06-19 上传 | 大小:1.44mb | 下载:0
[VHDL编程] IterativeDecodingofBinary
说明:In this paper, energy efficient VLSI architectures for linear turbo equalization are studied. Linear turbo equalizers exhibit dramatic bit error rate (BER) improvement over conventional equalizers by enabling a form of joint equalization and deco<suresh> 在 2025-06-19 上传 | 大小:1.45mb | 下载:0
[VHDL编程] DA[DA9708]
说明:FPGA控制DA9708 输出4种常见波形_调频和调幅-FPGA control DA9708 output four kinds of common waveform _ FM and AM<徐宏> 在 2025-06-19 上传 | 大小:1.45mb | 下载:0
[VHDL编程] Verilog_COMPLEXCLOCK-v2013.10.07
说明:电子钟,闹钟,秒表,可调时间,采用6位数码管显示-Electronic clock, alarm clock, stopwatch, adjustable time, the use of six digital tube display<hhxy> 在 2025-06-19 上传 | 大小:1.44mb | 下载:0
[VHDL编程] referee-partner
说明:一种能够将多种球类(足球,篮球,网球)的计时、计分和重要数据记录等功能综合在一起的VHDL程序。-referee partner.<黄祖明> 在 2025-06-19 上传 | 大小:1.44mb | 下载:0
[VHDL编程] verilog-radix4
说明:Master Thesis(FFT_RADIX-4)-This thesis deals with a 64-point Radix-4 in-place FFT, based on an improved FFT algorithm. The whole FFT structure was implemented based on self-designed modules and by manipulating the embedded Virtex II FPGA’s module<nikhil> 在 2025-06-19 上传 | 大小:1.44mb | 下载:0
[VHDL编程] DE2_WEB_QII_51
说明:ALTERA官方板子DE2官方代码,芯片是EP2C35F672C6N,官方历程(ALTERA official board DE2 official code, the chip is EP2C35F672C6N)<蜂蜜柚子 > 在 2025-06-19 上传 | 大小:1.45mb | 下载:0