资源列表
[VHDL编程] 44317447-Vhdl-Sim-Syn
说明:This document is meant to be an introduction to VHDL both as a simulation language and an input language for automatic logic synthesis. It is based on material originally prepared for the ASIC Design Laboratory taught at the University of Twente<phitoan> 在 2025-06-26 上传 | 大小:107kb | 下载:0
[VHDL编程] open_cores_VGAcore
说明:老外写的基于wishbone总线协议的VGA核控制器,Verilog版本适合于初学者学习VGA核控制器的原理以及总线协议的把握-Written by foreigners wishbone bus protocol based on the nuclear VGA controller, Verilog version is suitable for beginners to learn the principles of the controller and the VGA core gras<张昕> 在 2025-06-26 上传 | 大小:2.05mb | 下载:0
[VHDL编程] MIT[1].Press_.Circuit.Design.with.VHDL._2004_.TLF
说明:This verilog vending machine code. We can eat beverage and soda with only $1.25-This is verilog vending machine code. We can eat beverage and soda with only $1.25<Psycho> 在 2025-06-26 上传 | 大小:4.82mb | 下载:0
[VHDL编程] Design-AND-gate
说明:通过应用QUARTUSII开发软件对与门的设计(二输入)和D触发器的设计。 -QUARTUSII development through the application of software and door design (two inputs) and the D flip-flop design.<renee> 在 2025-06-26 上传 | 大小:2kb | 下载:0
[VHDL编程] Multiplexer-Description
说明: 通过应用QUARTUSII开发软件对二选一多路选择器进行设计并运行结果-Software development through the application of QUARTUSII choose one of two multiplexer design and operation results<renee> 在 2025-06-26 上传 | 大小:10kb | 下载:0
[VHDL编程] Multiplexer-Description2
说明: 通过应用QUARTUSII开发软件对 四选一多路选择器进行设计,并给出运行结果-Software development through the application of QUARTUSII choose one of four multiplexer design, and operating results are given<renee> 在 2025-06-26 上传 | 大小:14kb | 下载:1
[VHDL编程] 3-8-encoder-design
说明: 通过应用QUARTUSII开发软件对3—8译码器进行设计,给出运行程序和结果-Development through the application of QUARTUSII 3-8 decoder software for design, operational procedures and results are given<renee> 在 2025-06-26 上传 | 大小:19kb | 下载:0