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[VHDL编程] kzhdverilogyf
说明:国内关于verilog hdl书讲解比较浅,没深度,对于读者应该查看verilog hdl英文标准-Nations on the book to explain verilog hdl more shallow, lacking depth, for English readers should see the standard verilog hdl<翁志能> 在 2025-06-09 上传 | 大小:292kb | 下载:0
[VHDL编程] fullsine
说明:This a code for sine wave generation in modelsim. The code is written in verilog. An LUT has to be added to this program to work completely.-This is a code for sine wave generation in modelsim. The code is written in verilog. An LUT has to be added t<Jithu> 在 2025-06-09 上传 | 大小:1kb | 下载:0
[VHDL编程] lcm_st7920
说明:EP2C8 FPGA下的ST7920控制器LCD的程序.-EP2C8 FPGA under the ST7920 controller LCD process.<张> 在 2025-06-09 上传 | 大小:1.01mb | 下载:0
[VHDL编程] SpreadShaping
说明:直接序列扩频+成型滤波,将编码后数据进行256倍扩频,再按照4倍内插根升余弦成型滤波,最后成形滤波后按4路并行输出,以满足并行输入DA的要求。-Direct Sequence Spread Spectrum+ shaping filter, the encoded data 256 times more spread spectrum, and then interpolated according to four times the root raised cosine shaping fil<袁磊> 在 2025-06-09 上传 | 大小:706kb | 下载:0