资源列表
[VHDL编程] eeprom_test_Verilog
说明:eeprom工程,实现了基本的读写,供参考。工程使用的IDE为“ISE Design Suite 14.7”,使用时可根据自己硬件,修改引脚配置和逻辑可控制。(EEPROM project, the realization of the basic reading and writing for reference. The IDE used in the project is "ISE Design Suite 14.7", which can be used to mod<shaoyang_v> 在 2025-06-29 上传 | 大小:156kb | 下载:1
[VHDL编程] Wavemaster_W5300
说明:用FPGA语言,基于W5300芯片实现TCP/IP协议的网络传输,将W5300部分程序实现IP封装,只有输入输出管脚和时钟,复位等管脚(FPGA language is used to realize the network transmission of TCP/IP protocol based on W5300 chip. The W5300 part of the program realizes IP packaging, and only the input and output p<董教授> 在 2025-06-29 上传 | 大小:23.44mb | 下载:0
[VHDL编程] Wavemaster_RS232
说明:基于FPGA实现RS232传输,代码有注释,共四个模块,方便实用(RS232 transmission based on FPGA,)<董教授> 在 2025-06-29 上传 | 大小:34.51mb | 下载:0
[VHDL编程] LaSaNewNB_M88E1111_TCP1000mhz
说明:用FPGA,基于M88E1111芯片实现的TCP/IP协议的千兆网,将协议封装成IP核(With the FPGA, the TCP/IP protocol based on the M88E1111 chip is used to encapsulate the protocol into IP core)<董教授> 在 2025-06-29 上传 | 大小:18.41mb | 下载:1
[VHDL编程] uart_test_Verilog
说明:用verilog实现了uart功能的demo工程。工程使用的IDE为“ISE Design Suite 14.7”,使用时可根据自己硬件,修改引脚配置即可。(The demo project of UART function is realized with Verilog. The IDE used in the project is "ISE Design Suite 14.7", which can be used to modify the pin configura<shaoyang_v> 在 2025-06-29 上传 | 大小:125kb | 下载:0
[VHDL编程] spi_mem_ctr
说明:spi接口的memory控制代码,非常简单实用,供参考(The memory control code of spi interface is very simple and practical for reference.)<一粒尘埃> 在 2025-06-29 上传 | 大小:288kb | 下载:0