VHDL源代码

..........\adder.vhd

..........\adder_nbit_generate.txt

..........\adder_variety_style.txt

..........\address_decoder_m68008.txt

..........\chess_clock.txt

..........\comparator8.txt

..........\comparetor_magnitude.txt

..........\compinst.vhd

..........\condsig.vhd

..........\condsigm.vhd

..........\conversion_altera.vhd

..........\counters_altera.vhd

..........\counter_conversion.txt

..........\counter_generate.txt

..........\counter_mod16_jk.txt

..........\counter_nbit.txt

..........\counter_pload.txt

..........\counter_wait.txt

..........\cpu_3rd_package.txt

..........\cpu_core.txt

..........\CPU_ram.txt

..........\CPU_rom.txt

..........\CPU_system.txt

..........\d-filp-flop_hct175.txt

..........\dc_motor.vhd

..........\decoder_bcd_to_7segment.txt

..........\decoder_hct139.txt

..........\fifo.txt

..........\hamming_decoder.txt

..........\hamming_encoder.txt

..........\hct245.txt

..........\latchinf.vhd

..........\majority_voter.txt

..........\mancala.vhd

..........\mealy1.txt

..........\moor1.txt

..........\moor2.txt

..........\multiplexer_ifelse.txt

..........\multiplier_booth.txt

..........\pelian_contrller.txt

..........\priority_encoder_highest.txt

..........\priority_encoder_ls.vhd

..........\pseudorandom.vhd

..........\ram_16x8.txt

..........\ram_LS.vhd

..........\random_generator.txt

..........\reg12.vhd

..........\reginf.vhd

..........\register_374.txt

..........\selsigen.vhd

..........\shift_register_164.txt

..........\smart_waveform.vhd

..........\State_areset.txt

..........\state_classic.txt

..........\state_moor_mealy.txt

..........\state_variable.txt

..........\statmach_altera.vhd

..........\step_motor.vhd

..........\testadder.vhd

..........\traffic_ls.vhd

..........\uart_ls.vhd

..........\universal_register.txt

..........\vhdl_example.html