文件名称:verilog
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是几个用Verilog HDL语言编写的源代码（里面包括实现滤波器等），对想学习这个语言的朋友很有帮助！ -Several languages to use Verilog HDL source code (which includes the realization of filters, etc.), to want to learn this language very helpful friend!
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下载文件列表
第六章
......\第六章
......\......\da_fir.v
......\......\DA_table.v
......\......\decimation.v
......\......\differentiator.v
......\......\fast_adder4b.v
......\......\fir.v
......\......\full_adder.v
......\......\half_adder.v
......\......\integrator_par.v
......\......\interpolation.v
......\......\mul12X13.v
......\......\mul4b_addtree.v
......\......\mul4b_shiftadd_fsm.v
......\......\par_fir.v
......\......\pipe_adder8b.v
......\......\ripple_adder4b.v
......\......\ser_fir.v
......\......\sincos.v
......\......\test_par_fir.v
......\......\文件列表.txt
......\第六章
......\......\da_fir.v
......\......\DA_table.v
......\......\decimation.v
......\......\differentiator.v
......\......\fast_adder4b.v
......\......\fir.v
......\......\full_adder.v
......\......\half_adder.v
......\......\integrator_par.v
......\......\interpolation.v
......\......\mul12X13.v
......\......\mul4b_addtree.v
......\......\mul4b_shiftadd_fsm.v
......\......\par_fir.v
......\......\pipe_adder8b.v
......\......\ripple_adder4b.v
......\......\ser_fir.v
......\......\sincos.v
......\......\test_par_fir.v
......\......\文件列表.txt