文件名称:verilogprojects

  • 所属分类:
  • 嵌入式/单片机编程
  • 资源属性:
  • [源码] [HTML]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 21.42mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • s***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

file is about verilog projects
相关搜索: verilog
projects

(系统自动生成,下载前可以参看下载内容)

下载文件列表

verilog projects\counters.htm

................\counters_files

................\..............\back2.gif

................\..............\banner_Counters1.gif

................\..............\fig3-15.gif

................\..............\fig3-16.gif

................\..............\fig3-17.gif

................\..............\next2.gif

................\..............\sumbul1a.gif

................\..............\sumtextb.jpg

................\documentation of evm(2).doc

................\evm.cr.mti

................\evm.mpf

................\FPU-Double

................\..........\Double_FPU.PDF

................\..........\fpu_add.v

................\..........\fpu_div.v

................\..........\fpu_double.v

................\..........\fpu_exceptions.v

................\..........\fpu_mul.v

................\..........\fpu_round.v

................\..........\fpu_sub.v

................\..........\fpu_TB.v

................\..........\pipeline

................\..........\........\fpu_addsub.v

................\..........\........\fpu_addsub_TB.v

................\..........\........\fpu_mul.v

................\..........\........\fpu_mul_TB.v

................\..........\........\Readme_pipeline.txt

................\..........\Readme.txt

................\..........\transcript

................\modulo counter.htm

................\modulo counter_files

................\....................\AC_Run1.js

................\....................\arrow2.gif

................\....................\cart.gif

................\....................\DIG4603.swf

................\....................\get_flash_version.swf

................\....................\gne_small.gif

................\....................\menu.js

................\....................\new.gif

................\....................\purchase.gif

................\....................\Rating.swf

................\....................\sddm.css

................\p1.v

................\p1.v.bak

................\security_documentation.doc

................\traffic1.doc

................\vishnu

................\......\11.doc

................\......\12.doc

................\......\13.doc

................\......\21.doc

................\......\22.doc

................\......\23.doc

................\......\blockdiagrams.doc

................\......\F1.doc

................\......\F2.doc

................\......\F3.doc

................\......\F4.doc

................\......\New Folder

................\......\..........\65_VISITOR_CNTR.pdf

................\......\..........\Desktop.7z

................\......\..........\docts33.pdf

................\......\..........\FinalVMSVol2.pdf

................\......\..........\Madrona_Visitor_Report_2005_final.pdf

................\......\..........\Monitoring_Methods.pdf

................\......\..........\sensors.docx

................\......\secure

................\......\total vistor counter

................\......\....................\Desktop.7z

................\......\....................\fwdproject.zip

................\......\....................\waveforms.zip

................\......\waveforms

................\......\.........\contl2.bmp

................\......\.........\contltop.bmp

................\......\.........\control1.bmp

................\......\.........\p6.bmp

................\......\.........\s1.bmp

................\......\.........\s2.bmp

................\......\.........\Thumbs.db

................\VISITOR COUNTER.doc

................\vsim.wlf

................\work

................\....\_info

................\....\_temp

................\....\.....\vlogmtc3xk

................\....\adder

................\....\.....\_primary.dat

................\....\.....\_primary.dbs

................\....\.....\_primary.vhd

................\....\.....\verilog.psm

................\....\bmu

................\....\...\_primary.dat

................\....\...\_primary.dbs

................\....\...\_primary.vhd

................\....\...\verilog.psm

................\....\cont

................\....\....\_primary.dat

................\....\....\_primary.dbs

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