文件名称:fifo
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在fpga中实现fifo，配合数码管显示，仅供学习参考-Realized in fpga fifo, with digital display, study and reference purposes only
(系统自动生成,下载前可以参看下载内容)
下载文件列表
fifo\datain.v
....\datain.v.bak
....\.b\altsyncram_0tj1.tdf
....\..\altsyncram_urj1.tdf
....\..\a_dpfifo_bf21.tdf
....\..\a_dpfifo_dg21.tdf
....\..\a_fefifo_n4e.tdf
....\..\cntr_cjb.tdf
....\..\cntr_ekb.tdf
....\..\cntr_oj7.tdf
....\..\cntr_qk7.tdf
....\..\dpram_rt01.tdf
....\..\dpram_tu01.tdf
....\..\fifo.cbx.xml
....\..\fifo.cmp.rdb
....\..\fifo.dbp
....\..\fifo.db_info
....\..\fifo.eco.cdb
....\..\fifo.hier_info
....\..\fifo.hif
....\..\fifo.map.bpm
....\..\fifo.map.cdb
....\..\fifo.map.ecobp
....\..\fifo.map.hdb
....\..\fifo.map.logdb
....\..\fifo.map.qmsg
....\..\fifo.map_bb.cdb
....\..\fifo.map_bb.hdb
....\..\fifo.map_bb.logdb
....\..\fifo.pre_map.cdb
....\..\fifo.pre_map.hdb
....\..\fifo.psp
....\..\fifo.pss
....\..\fifo.rtlv.hdb
....\..\fifo.rtlv_sg.cdb
....\..\fifo.rtlv_sg_swap.cdb
....\..\fifo.sgdiff.cdb
....\..\fifo.sgdiff.hdb
....\..\fifo.sld_design_entry.sci
....\..\fifo.sld_design_entry_dsc.sci
....\..\fifo.syn_hier_info
....\..\fifo.tis_db_list.ddb
....\..\logic_util_heursitic.dat
....\..\prev_cmp_fifo.qmsg
....\..\scfifo_4921.tdf
....\..\scfifo_6a21.tdf
....\fifo.asm.rpt
....\fifo.done
....\fifo.dpf
....\fifo.eda.rpt
....\fifo.fit.rpt
....\fifo.fit.summary
....\fifo.flow.rpt
....\fifo.map.rpt
....\fifo.map.summary
....\fifo.pin
....\fifo.pof
....\fifo.qpf
....\fifo.qsf
....\fifo.qws
....\fifo.sof
....\fifo.tan.rpt
....\fifo.tan.summary
....\fifo.v
....\fifo.v.bak
....\fifotest.qip
....\fifotest.v
....\fifotest_bb.v
....\fifotest_inst.v
....\fifo_nativelink_simulation.rpt
....\greybox_tmp\cbx_args.txt
....\incremental_db\compiled_partitions\fifo.db_info
....\..............\...................\fifo.root_partition.cmp.cdb
....\..............\...................\fifo.root_partition.cmp.dfp
....\..............\...................\fifo.root_partition.cmp.hdb
....\..............\...................\fifo.root_partition.cmp.kpt
....\..............\...................\fifo.root_partition.cmp.logdb
....\..............\...................\fifo.root_partition.cmp.rcfdb
....\..............\...................\fifo.root_partition.cmp.re.rcfdb
....\..............\...................\fifo.root_partition.map.cdb
....\..............\...................\fifo.root_partition.map.dpi
....\..............\...................\fifo.root_partition.map.hdb
....\..............\...................\fifo.root_partition.map.kpt
....\..............\README
....\led_dong.v
....\led_dong.v.bak
....\simulation\modelsim\fifo.sft
....\..........\........\fifo.vo
....\..........\........\fifo.vt
....\..........\........\fifo.vt.bak
....\..........\........\fifo_modelsim.xrf
....\..........\........\fifo_run_msim_rtl_verilog.do
....\..........\........\fifo_run_msim_rtl_verilog.do.bak
....\..........\........\fifo_run_msim_rtl_verilog.do.bak1
....\..........\........\fifo_run_msim_rtl_verilog.do.bak2
....\..........\........\fifo_run_msim_rtl_verilog.do.bak3
....\..........\........\fifo_run_msim_rtl_verilog.do.bak4
....\..........\........\fifo_run_msim_rtl_verilog.do.bak5
....\..........\........\fifo_run_msim_rtl_verilog.do.bak6
....\..........\........\fifo_run_msim_rtl_verilog.do.bak7
....\datain.v.bak
....\.b\altsyncram_0tj1.tdf
....\..\altsyncram_urj1.tdf
....\..\a_dpfifo_bf21.tdf
....\..\a_dpfifo_dg21.tdf
....\..\a_fefifo_n4e.tdf
....\..\cntr_cjb.tdf
....\..\cntr_ekb.tdf
....\..\cntr_oj7.tdf
....\..\cntr_qk7.tdf
....\..\dpram_rt01.tdf
....\..\dpram_tu01.tdf
....\..\fifo.cbx.xml
....\..\fifo.cmp.rdb
....\..\fifo.dbp
....\..\fifo.db_info
....\..\fifo.eco.cdb
....\..\fifo.hier_info
....\..\fifo.hif
....\..\fifo.map.bpm
....\..\fifo.map.cdb
....\..\fifo.map.ecobp
....\..\fifo.map.hdb
....\..\fifo.map.logdb
....\..\fifo.map.qmsg
....\..\fifo.map_bb.cdb
....\..\fifo.map_bb.hdb
....\..\fifo.map_bb.logdb
....\..\fifo.pre_map.cdb
....\..\fifo.pre_map.hdb
....\..\fifo.psp
....\..\fifo.pss
....\..\fifo.rtlv.hdb
....\..\fifo.rtlv_sg.cdb
....\..\fifo.rtlv_sg_swap.cdb
....\..\fifo.sgdiff.cdb
....\..\fifo.sgdiff.hdb
....\..\fifo.sld_design_entry.sci
....\..\fifo.sld_design_entry_dsc.sci
....\..\fifo.syn_hier_info
....\..\fifo.tis_db_list.ddb
....\..\logic_util_heursitic.dat
....\..\prev_cmp_fifo.qmsg
....\..\scfifo_4921.tdf
....\..\scfifo_6a21.tdf
....\fifo.asm.rpt
....\fifo.done
....\fifo.dpf
....\fifo.eda.rpt
....\fifo.fit.rpt
....\fifo.fit.summary
....\fifo.flow.rpt
....\fifo.map.rpt
....\fifo.map.summary
....\fifo.pin
....\fifo.pof
....\fifo.qpf
....\fifo.qsf
....\fifo.qws
....\fifo.sof
....\fifo.tan.rpt
....\fifo.tan.summary
....\fifo.v
....\fifo.v.bak
....\fifotest.qip
....\fifotest.v
....\fifotest_bb.v
....\fifotest_inst.v
....\fifo_nativelink_simulation.rpt
....\greybox_tmp\cbx_args.txt
....\incremental_db\compiled_partitions\fifo.db_info
....\..............\...................\fifo.root_partition.cmp.cdb
....\..............\...................\fifo.root_partition.cmp.dfp
....\..............\...................\fifo.root_partition.cmp.hdb
....\..............\...................\fifo.root_partition.cmp.kpt
....\..............\...................\fifo.root_partition.cmp.logdb
....\..............\...................\fifo.root_partition.cmp.rcfdb
....\..............\...................\fifo.root_partition.cmp.re.rcfdb
....\..............\...................\fifo.root_partition.map.cdb
....\..............\...................\fifo.root_partition.map.dpi
....\..............\...................\fifo.root_partition.map.hdb
....\..............\...................\fifo.root_partition.map.kpt
....\..............\README
....\led_dong.v
....\led_dong.v.bak
....\simulation\modelsim\fifo.sft
....\..........\........\fifo.vo
....\..........\........\fifo.vt
....\..........\........\fifo.vt.bak
....\..........\........\fifo_modelsim.xrf
....\..........\........\fifo_run_msim_rtl_verilog.do
....\..........\........\fifo_run_msim_rtl_verilog.do.bak
....\..........\........\fifo_run_msim_rtl_verilog.do.bak1
....\..........\........\fifo_run_msim_rtl_verilog.do.bak2
....\..........\........\fifo_run_msim_rtl_verilog.do.bak3
....\..........\........\fifo_run_msim_rtl_verilog.do.bak4
....\..........\........\fifo_run_msim_rtl_verilog.do.bak5
....\..........\........\fifo_run_msim_rtl_verilog.do.bak6
....\..........\........\fifo_run_msim_rtl_verilog.do.bak7