加法器是产生数的和的装置。常用作计算机算术逻辑部件，执行逻辑操作、移位与指令调用。在电子学中，加法器是一种数位电路，其可进行数字的加法计算。在现代的电脑中，加法器存在于算术逻辑单元之中。 加法器可以用来表示各种数值，如：BCD、加三码，主要的加法器是以二进制作运算。加法器可以用组合逻辑电路实现也可以用VHDL语言实现。-Adder is generated and the number of devices. Arithmetic logic unit is used as a computer, perform logical operations, shift and command call. In electronics, a digital adder circuit, the addition of numbers can be calculated. In the modern computer, the adder being present in the arithmetic logic unit. Adder can be used to represent various values, such as: BCD, plus three yards, the major operator for a binary adder. Adder combinational logic circuit can also use VHDL language.