文件名称:Exp10_One_Wire
介绍说明－－下载内容均来自于网络，请自行研究使用
基于FPGA和Nios II设计的1-wire数字温度计-failed to translate
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Exp10_One_Wire\.sopc_builder\install.ptf
..............\.............\install2.ptf
..............\.............\preferences.xml
..............\1_Wire_Test.asm.rpt
..............\1_Wire_Test.bdf
..............\1_Wire_Test.done
..............\1_Wire_Test.fit.rpt
..............\1_Wire_Test.fit.smsg
..............\1_Wire_Test.fit.summary
..............\1_Wire_Test.flow.rpt
..............\1_Wire_Test.jdi
..............\1_Wire_Test.map.rpt
..............\1_Wire_Test.map.smsg
..............\1_Wire_Test.map.summary
..............\1_Wire_Test.pin
..............\1_Wire_Test.pof
..............\1_Wire_Test.qpf
..............\1_Wire_Test.qsf
..............\1_Wire_Test.qws
..............\1_Wire_Test.sof
..............\1_Wire_Test.tan.rpt
..............\1_Wire_Test.tan.summary
..............\cpu.ocp
..............\cpu.sdc
..............\cpu.v
..............\cpu_bht_ram.mif
..............\cpu_dc_tag_ram.mif
..............\cpu_ic_tag_ram.mif
..............\cpu_jtag_debug_module_sysclk.v
..............\cpu_jtag_debug_module_tck.v
..............\cpu_jtag_debug_module_wrapper.v
..............\cpu_ociram_default_contents.mif
..............\cpu_oci_test_bench.v
..............\cpu_rf_ram_a.mif
..............\cpu_rf_ram_b.mif
..............\cpu_test_bench.v
..............\incremental_db\compiled_partitions\1_Wire_Test.root_partition.cmp.atm
..............\..............\...................\1_Wire_Test.root_partition.cmp.cfm
..............\..............\...................\1_Wire_Test.root_partition.cmp.dfp
..............\..............\...................\1_Wire_Test.root_partition.cmp.hdbx
..............\..............\...................\1_Wire_Test.root_partition.cmp.kpt
..............\..............\...................\1_Wire_Test.root_partition.cmp.logdb
..............\..............\...................\1_Wire_Test.root_partition.cmp.rcf
..............\..............\...................\1_Wire_Test.root_partition.map.atm
..............\..............\...................\1_Wire_Test.root_partition.map.dpi
..............\..............\...................\1_Wire_Test.root_partition.map.hdbx
..............\..............\...................\1_Wire_Test.root_partition.map.kpt
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.dpi
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.hdbx
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.kpt
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
..............\..............\README
..............\jtag_uart.v
..............\my_cpu.bsf
..............\my_cpu.ptf
..............\my_cpu.ptf.8.0
..............\my_cpu.ptf.bak
..............\my_cpu.ptf.pre_generation_ptf
..............\my_cpu.qip
..............\my_cpu.sopc
..............\my_cpu.sopcinfo
..............\my_cpu.v
..............\my_cpu_generation_script
..............\my_cpu_log.txt
..............\my_cpu_setup_quartus.tcl
..............\........im\dummy_file
..............\..........\jtag_uart_input_mutex.dat
..............\..........\jtag_uart_input_stream.dat
..............\..........\jtag_uart_output_stream.dat
..............\SDA.v
..............\SEG_DATA.v
..............\SEG_SEL.v
..............\software\One_Wire_Test\.cdtbuild
..............\........\.............\.cdtproject
..............\........\.............\.project
..............\........\.............\.settings\org.eclipse.cdt.core.prefs
..............\........\.............\.........\org.eclipse.cdt.managedbuilder.core.prefs
..............\........\.............\application.stf
..............\........\.............\Debug\generated_app.sh
..............\........\.............\.....\makefile
..............\........\.............\.....\obj\main.d
..............\........\.............\.....\...\main.o
..............\........\.............\.....\One_Wire_Test.el
..............\.............\install2.ptf
..............\.............\preferences.xml
..............\1_Wire_Test.asm.rpt
..............\1_Wire_Test.bdf
..............\1_Wire_Test.done
..............\1_Wire_Test.fit.rpt
..............\1_Wire_Test.fit.smsg
..............\1_Wire_Test.fit.summary
..............\1_Wire_Test.flow.rpt
..............\1_Wire_Test.jdi
..............\1_Wire_Test.map.rpt
..............\1_Wire_Test.map.smsg
..............\1_Wire_Test.map.summary
..............\1_Wire_Test.pin
..............\1_Wire_Test.pof
..............\1_Wire_Test.qpf
..............\1_Wire_Test.qsf
..............\1_Wire_Test.qws
..............\1_Wire_Test.sof
..............\1_Wire_Test.tan.rpt
..............\1_Wire_Test.tan.summary
..............\cpu.ocp
..............\cpu.sdc
..............\cpu.v
..............\cpu_bht_ram.mif
..............\cpu_dc_tag_ram.mif
..............\cpu_ic_tag_ram.mif
..............\cpu_jtag_debug_module_sysclk.v
..............\cpu_jtag_debug_module_tck.v
..............\cpu_jtag_debug_module_wrapper.v
..............\cpu_ociram_default_contents.mif
..............\cpu_oci_test_bench.v
..............\cpu_rf_ram_a.mif
..............\cpu_rf_ram_b.mif
..............\cpu_test_bench.v
..............\incremental_db\compiled_partitions\1_Wire_Test.root_partition.cmp.atm
..............\..............\...................\1_Wire_Test.root_partition.cmp.cfm
..............\..............\...................\1_Wire_Test.root_partition.cmp.dfp
..............\..............\...................\1_Wire_Test.root_partition.cmp.hdbx
..............\..............\...................\1_Wire_Test.root_partition.cmp.kpt
..............\..............\...................\1_Wire_Test.root_partition.cmp.logdb
..............\..............\...................\1_Wire_Test.root_partition.cmp.rcf
..............\..............\...................\1_Wire_Test.root_partition.map.atm
..............\..............\...................\1_Wire_Test.root_partition.map.dpi
..............\..............\...................\1_Wire_Test.root_partition.map.hdbx
..............\..............\...................\1_Wire_Test.root_partition.map.kpt
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.atm
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.dpi
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.hdbx
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.kpt
..............\..............\...................\1_Wire_Test.sldhu_30e344a040fd07e1533c49de5f2d67d1.map.logdb
..............\..............\README
..............\jtag_uart.v
..............\my_cpu.bsf
..............\my_cpu.ptf
..............\my_cpu.ptf.8.0
..............\my_cpu.ptf.bak
..............\my_cpu.ptf.pre_generation_ptf
..............\my_cpu.qip
..............\my_cpu.sopc
..............\my_cpu.sopcinfo
..............\my_cpu.v
..............\my_cpu_generation_script
..............\my_cpu_log.txt
..............\my_cpu_setup_quartus.tcl
..............\........im\dummy_file
..............\..........\jtag_uart_input_mutex.dat
..............\..........\jtag_uart_input_stream.dat
..............\..........\jtag_uart_output_stream.dat
..............\SDA.v
..............\SEG_DATA.v
..............\SEG_SEL.v
..............\software\One_Wire_Test\.cdtbuild
..............\........\.............\.cdtproject
..............\........\.............\.project
..............\........\.............\.settings\org.eclipse.cdt.core.prefs
..............\........\.............\.........\org.eclipse.cdt.managedbuilder.core.prefs
..............\........\.............\application.stf
..............\........\.............\Debug\generated_app.sh
..............\........\.............\.....\makefile
..............\........\.............\.....\obj\main.d
..............\........\.............\.....\...\main.o
..............\........\.............\.....\One_Wire_Test.el