文件名称:verilog135

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 127kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • xuxia*****
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  • 下载说明:
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135个实例,非常详细。有很高的参考价值-135 instances, very detailed. A high reference value
(系统自动生成,下载前可以参看下载内容)

下载文件列表

verilog hdl教程135例\chap10\acc.acf

....................\....3\adder4.acf

....................\examples.pdf

....................\chap10\acc.hif

....................\....3\adder4.hif

....................\.....\adder4.ndb

....................\....10\acc.v

....................\......\accn.v

....................\.....1\account.v

....................\....7\add4_1.v

....................\.....\add4_2.v

....................\.....\add4_3.v

....................\....10\add8.v

....................\....8\add8_tp.v

....................\....5\adder.v

....................\.....\adder16.v

....................\....3\adder4.v

....................\....10\adder8.v

....................\....3\adder_tp.v

....................\....12\add_ahead.v

....................\......\add_bx.v

....................\......\add_jl.v

....................\......\add_tree.v

....................\....5\alu.v

....................\....6\alutask.v

....................\.....\alu_tp.v

....................\....3\aoi.v

....................\....9\bidir.v

....................\.....\bidir2.v

....................\....5\block.v

....................\....10\block1.v

....................\......\block2.v

....................\......\block3.v

....................\......\block4.v

....................\....5\buried_ff.v

....................\....8\carry_udp.v

....................\.....\carry_udpx1.v

....................\.....\carry_udpx2.v

....................\....11\clock.v

....................\....6\code_83.v

....................\....9\code_83.v

....................\....5\compile.v

....................\....10\control.v

....................\.....2\correlator.v

....................\....6\count.v

....................\....5\count.v

....................\....11\count10.v

....................\....3\count4.v

....................\....7\count4.v

....................\....3\count4_tp.v

....................\....5\count60.v

....................\....8\count8_tp.v

....................\....12\crc.v

....................\......\cycle.v

....................\....9\decode47.v

....................\....5\decode4_7.v

....................\....12\decoder1.v

....................\......\decoder2.v

....................\....9\decoder_38.v

....................\....8\delay.v

....................\....9\dff.v

....................\....8\dff.v

....................\....9\dff1.v

....................\.....\dff2.v

....................\....8\dff_udp.v

....................\....9\encoder8_3.v

....................\....12\fir.v

....................\.....1\fre_ctrl.v

....................\.....0\fsm.v

....................\....7\full_add1.v

....................\.....\full_add2.v

....................\.....\full_add3.v

....................\.....\full_add4.v

....................\.....\full_add5.v

....................\....6\funct.v

....................\.....\funct_tp.v

....................\....9\gate1.v

....................\.....\gate2.v

....................\.....\gate3.v

....................\....7\half_add1.v

....................\.....\half_add2.v

....................\.....\half_add3.v

....................\.....\half_add4.v

....................\....9\jk_ff.v

....................\.....\johnson.v

....................\....8\latch.v

....................\....9\latch_1.v

....................\....11\latch_16.v

....................\....9\latch_2.v

....................\.....\latch_8.v

....................\....12\linear.v

....................\.....0\longframe1.v

....................\......\longframe2.v

....................\....5\loop1.v

....................\.....\loop2.v

....................\.....\loop3.v

....................\....9\mac.v

....................\.....\mac_tp.v

....................\.....\map_lpm_ram.v

....................\.....\mpc.v

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