文件名称:verilog

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 92kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 铁*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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FPGA中verilog语言实现的的USB接口协议,希望能对大家有用-FPGA verilog language in the USB interface protocol implemented in the hope that useful
(系统自动生成,下载前可以参看下载内容)

下载文件列表

verilog\include\stm_def.v

.......\.......\Udevconnections.v

.......\.......\Udevctldef.v

.......\.......\Udevendpoints.v

.......\.......\Udevinouts.v

.......\.......\Udevios.v

.......\.......\Udevreadmux.v

.......\.......\usb_tb_def.v

.......\.......\Usiecntrdef.v

.......\.......\Usiecrcdef.v

.......\.......\Usiedcddef.v

.......\.......\Usiedplldef.v

.......\.......\Usienrzidef.v

.......\.......\Usienrzodef.v

.......\.......\Usiepktdef.v

.......\.......\Uusbdef.v

.......\.......\Uvendorcmdinouts.v

.......\.......\Uvendorcmdios.v

.......\.......\Uvendorconnections.v

.......\smarti\README

.......\......\smarti.v

.......\......\smarti_box.v

.......\......\smarti_params.v

.......\......\tri_bus.v

.......\usbcode\.README.swp

.......\.......\dffr.v

.......\.......\README

.......\.......\stm_def.v

.......\.......\tri_signal.v

.......\.......\U8051int.v

.......\.......\Ubulkfiforx.v

.......\.......\Ubulkfifotx.v

.......\.......\Ucore.v

.......\.......\UCtlreg.v

.......\.......\Udevctl.v

.......\.......\Udeviceintf.v

.......\.......\Udevrom.v

.......\.......\Udevsof.v

.......\.......\Udualfifo.srp

.......\.......\Udualfifo.v

.......\.......\Udualfiforx.srp

.......\.......\Udualfiforx.v

.......\.......\Udualfiforx_tmpl.v

.......\.......\Udualfifo_tmpl.v

.......\.......\Udual_mmc_sm.v

.......\.......\Udual_mmc_sm.v_sm

.......\.......\Ufifo.v

.......\.......\Ufifo3rd.v

.......\.......\Ufifocont.v

.......\.......\Ufiforx.v

.......\.......\Ufiforxcont.v

.......\.......\Ufpga2.v

.......\.......\Uparts.v

.......\.......\Usbmonitor.v

.......\.......\Usbtop.v

.......\.......\usb_mp3.v

.......\.......\usb_mp3_dual.v

.......\.......\usb_tb_def.v

.......\.......\Userialeng.v

.......\.......\Usiecntr.v

.......\.......\Usiecrc.v

.......\.......\Usiedcd.v

.......\.......\Usiedpll.v

.......\.......\Usienrzi.v

.......\.......\Usienrzo.v

.......\.......\Usiepkt.v

.......\.......\Utop.v

.......\.......\Utop_mmc_sm.v

.......\.......\Uusb_dual.v

.......\.......\Uusb_mmc_sm.v

.......\...mmc\cmd_transmit.v

.......\......\data_receive.v

.......\......\data_transmit.v

.......\......\gen_clock_5m.v

.......\......\mmc_tri_bus.v

.......\......\receive.v

.......\......\status_receive.v

.......\......\transcript

.......\......\transmit.v

.......\......\usbmmc.v

.......\......\usbmmc_box.v

.......\......\usbmmc_variable.v

.......\include

.......\smarti

.......\usbcode

.......\usbmmc

verilog

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