文件名称:verilog-code

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.33mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • pon***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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都是verilog代码:多路选择器代码,储存器代码,时钟分频器代码,串并转换电路代码,香农扩展运算代码,ram代码。-MUX code and REGISTER code clock divider code string conversion circuit code, Shannon extended op code, the ram code.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

verilog code

............\CRC10.v

............\Example-2-1

............\...........\HelloVlog.v

............\Example-3-1

............\...........\FullAdd.v

............\...........\transcript

............\Example-3-2

............\...........\FullAdd.v

............\Example-3-3

............\...........\CRC10.v

............\Example-4-1

............\Example-4-10

............\............\bibus

............\............\.....\bibus.prd

............\............\.....\bibus.prj

............\............\.....\bibus.v

............\............\.....\decode.v

............\............\.....\rev_1

............\............\.....\.....\bibus.fse

............\............\.....\.....\bibus.srd

............\............\.....\.....\bibus.srm

............\............\.....\.....\bibus.srr

............\............\.....\.....\bibus.srs

............\............\.....\.....\bibus.sxr

............\............\.....\.....\bibus.tcl

............\............\.....\.....\bibus.tlg

............\............\.....\.....\bibus.vqm

............\............\.....\.....\bibus.xrf

............\............\.....\.....\bibus_cons.tcl

............\............\.....\.....\bibus_rm.tcl

............\............\.....\.....\rpt_bibus.areasrr

............\............\.....\.....\rpt_bibus_areasrr.htm

............\............\.....\.....\syntmp

............\............\.....\.....\......\bibus.msg

............\............\.....\.....\......\bibus.plg

............\............\.....\.....\......\bibus_cons_ui.tcl

............\............\.....\.....\verif

............\............\.....\.....\.....\bibus.vif

............\............\.....\syntmp.msg

............\............\complex_bibus

............\............\.............\complex_bibus.prd

............\............\.............\complex_bibus.prj

............\............\.............\complex_bibus.v

............\............\.............\complex_bibus2.v

............\............\.............\counter.v

............\............\.............\decode.v

............\............\.............\rev_1

............\............\.............\.....\AutoConstraint_complex_bibus.sdc

............\............\.............\.....\complex_bibus.fse

............\............\.............\.....\complex_bibus.srd

............\............\.............\.....\complex_bibus.srm

............\............\.............\.....\complex_bibus.srr

............\............\.............\.....\complex_bibus.srs

............\............\.............\.....\complex_bibus.sxr

............\............\.............\.....\complex_bibus.tcl

............\............\.............\.....\complex_bibus.tlg

............\............\.............\.....\complex_bibus.vqm

............\............\.............\.....\complex_bibus.xrf

............\............\.............\.....\complex_bibus2.fse

............\............\.............\.....\complex_bibus2.srd

............\............\.............\.....\complex_bibus2.srm

............\............\.............\.....\complex_bibus2.srr

............\............\.............\.....\complex_bibus2.srs

............\............\.............\.....\complex_bibus2.sxr

............\............\.............\.....\complex_bibus2.tcl

............\............\.............\.....\complex_bibus2.tlg

............\............\.............\.....\complex_bibus2.vqm

............\............\.............\.....\complex_bibus2.xrf

............\............\.............\.....\complex_bibus2_cons.tcl

............\............\.............\.....\complex_bibus2_rm.tcl

............\............\.............\.....\complex_bibus_cons.tcl

............\............\.............\.....\complex_bibus_rm.tcl

............\............\.............\.....\decode.srr

............\............\.............\.....\par_1

............\............\.............\.....\rpt_complex_bibus.areasrr

............\............\.............\.....\rpt_complex_bibus_areasrr.htm

............\............\.............\.....\syntmp

............\............\.............\.....\......\complex_bibus.msg

...

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