文件名称:XHDL4[1].0.40
介绍说明－－下载内容均来自于网络，请自行研究使用
实现VHDL和verilog之间的语言转换，方便程序之间的以致，XHDL版本4.0.40。-Achieved between VHDL and verilog language conversion between programs so easy, XHDL version 4.0.40.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
XHDL4[1].0.40\XHDL4.0.40\bin\mingwm10.dll
.............\..........\...\QtCore4.dll
.............\..........\...\QtGui4.dll
.............\..........\...\QtNetwork4.dll
.............\..........\...\xhdl.exe
.............\..........\...\xhdlc.exe
.............\..........\docs\pdf\change_log.pdf
.............\..........\....\...\X-HDL.pdf
.............\..........\....\...\XLM.pdf
.............\..........\packages\non_synthesizable\XHDL_bit.vhdl
.............\..........\........\.................\XHDL_misc.vhdl
.............\..........\........\.................\XHDL_std_logic.vhdl
.............\..........\........\.................\XHDL_std_ulogic.vhdl
.............\..........\........\synthesizable\XHDL_bit.vhdl
.............\..........\........\.............\XHDL_std_logic.vhdl
.............\..........\........\.............\XHDL_std_ulogic.vhdl
.............\..........\util\make_lib.pl
.............\..........\docs\pdf
.............\..........\packages\non_synthesizable
.............\..........\........\synthesizable
.............\..........\bin
.............\..........\docs
.............\..........\license
.............\..........\packages
.............\..........\util
.............\XHDL4.0.40
XHDL4[1].0.40
.............\..........\...\QtCore4.dll
.............\..........\...\QtGui4.dll
.............\..........\...\QtNetwork4.dll
.............\..........\...\xhdl.exe
.............\..........\...\xhdlc.exe
.............\..........\docs\pdf\change_log.pdf
.............\..........\....\...\X-HDL.pdf
.............\..........\....\...\XLM.pdf
.............\..........\packages\non_synthesizable\XHDL_bit.vhdl
.............\..........\........\.................\XHDL_misc.vhdl
.............\..........\........\.................\XHDL_std_logic.vhdl
.............\..........\........\.................\XHDL_std_ulogic.vhdl
.............\..........\........\synthesizable\XHDL_bit.vhdl
.............\..........\........\.............\XHDL_std_logic.vhdl
.............\..........\........\.............\XHDL_std_ulogic.vhdl
.............\..........\util\make_lib.pl
.............\..........\docs\pdf
.............\..........\packages\non_synthesizable
.............\..........\........\synthesizable
.............\..........\bin
.............\..........\docs
.............\..........\license
.............\..........\packages
.............\..........\util
.............\XHDL4.0.40
XHDL4[1].0.40