logic_analysis\char_rom.qip

..............\char_rom.v

..............\char_rom_bb.v

..............\char_rom_data.mif

..............\char_rom_inst.v

..............\char_rom_wave0.jpg

..............\char_rom_waveforms.html

..............\db\altsyncram_poa1.tdf

..............\..\altsyncram_rka1.tdf

..............\..\logic_analysis.asm.qmsg

..............\..\logic_analysis.cbx.xml

..............\..\logic_analysis.cmp.ecobp

..............\..\logic_analysis.cmp.kpt

..............\..\logic_analysis.cmp.rdb

..............\..\logic_analysis.cmp_merge.kpt

..............\..\logic_analysis.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd

..............\..\logic_analysis.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd

..............\..\logic_analysis.db_info

..............\..\logic_analysis.eco.cdb

..............\..\logic_analysis.fit.qmsg

..............\..\logic_analysis.hier_info

..............\..\logic_analysis.hif

..............\..\logic_analysis.lpc.html

..............\..\logic_analysis.lpc.rdb

..............\..\logic_analysis.lpc.txt

..............\..\logic_analysis.map.ecobp

..............\..\logic_analysis.map.kpt

..............\..\logic_analysis.map.qmsg

..............\..\logic_analysis.map_bb.cdb

..............\..\logic_analysis.map_bb.hdb

..............\..\logic_analysis.map_bb.logdb

..............\..\logic_analysis.pre_map.cdb

..............\..\logic_analysis.pre_map.hdb

..............\..\logic_analysis.rtlv.hdb

..............\..\logic_analysis.rtlv_sg.cdb

..............\..\logic_analysis.rtlv_sg_swap.cdb

..............\..\logic_analysis.sgdiff.cdb

..............\..\logic_analysis.sgdiff.hdb

..............\..\logic_analysis.sld_design_entry.sci

..............\..\logic_analysis.sld_design_entry_dsc.sci

..............\..\logic_analysis.sta.qmsg

..............\..\logic_analysis.sta.rdb

..............\..\logic_analysis.syn_hier_info

..............\..\logic_analysis.taw.rdb

..............\..\logic_analysis.tiscmp.fastest_slow_1200mv_0c.ddb

..............\..\logic_analysis.tiscmp.fastest_slow_1200mv_85c.ddb

..............\..\logic_analysis.tiscmp.fast_1200mv_0c.ddb

..............\..\logic_analysis.tiscmp.slow_1200mv_0c.ddb

..............\..\logic_analysis.tiscmp.slow_1200mv_85c.ddb

..............\..\logic_analysis.tis_db_list.ddb

..............\..\logic_analysis_global_asgn_op.abo

..............\..\prev_cmp_logic_analysis.asm.qmsg

..............\..\prev_cmp_logic_analysis.fit.qmsg

..............\..\prev_cmp_logic_analysis.map.qmsg

..............\..\prev_cmp_logic_analysis.qmsg

..............\..\prev_cmp_logic_analysis.sta.qmsg

..............\..\uut_PLL_ctrl_altpll.v

..............\db

..............\incremental_db\compiled_partitions\logic_analysis.root_partition.cmp.atm

..............\..............\...................\logic_analysis.root_partition.cmp.dfp

..............\..............\...................\logic_analysis.root_partition.cmp.hdbx

..............\..............\...................\logic_analysis.root_partition.cmp.kpt

..............\..............\...................\logic_analysis.root_partition.cmp.logdb

..............\..............\...................\logic_analysis.root_partition.cmp.rcf

..............\..............\...................\logic_analysis.root_partition.map.atm

..............\..............\...................\logic_analysis.root_partition.map.dpi

..............\..............\...................\logic_analysis.root_partition.map.hdbx

..............\..............\...................\logic_analysis.root_partition.map.kpt

..............\..............\...................\logic_analysis.root_partition.merge_hb.atm

..............\..............\compiled_partitions

..............\..............\README

..............\incremental_db

..............\logic_analysis.asm.rpt

..............\logic_analysis.done

..............\logic_analysis.fit.rpt

..............\logic_analysis.fit.smsg

..............\logic_analysis.fit.summary

..............\logic_analysis.flow.rpt

..............\logic_analysis.map.rpt

..............\logic_analysis.map.summary

..............\logic_analysis.out.sdc

..............\logic_analysis.pin

..