七段数码是纯组合电路，通常的小规模专用IC，如74或4000系列的器件只能作十进制BCD码译码，然而数字系统中的数据处理和运算都是2进制的，所以输出表达都是16进制的，为了满足16进制数的译码显示，最方便的方法就是利用译码程序在FPGA\CPLD中来实现。本实验作为7段译码器，输出信号LED7S的7位分别是g、f、e、d、c、b、a，高位在左，低位在右。例如当LED7S输出为“1101101”时，数码管的7个段g、f、e、d、c、b、a分别为1、1、0、1、1、1、0、1。接有高电平段发亮，于是数码管显示“5”。-Seven-Segment is a pure combinational circuit, usually small-scale special IC, such as 74 or 4000 Series devices only for decimal BCD decoding, digital systems, however data processing and operations are binary, so the output expression hexadecimal, in order to meet the decoding of the hex number display, the most convenient way is to use a decoding program to implement in the FPGA \ CPLD. In this study, as a 7-segment decoder, the output signal LED7S 7 g, f, e, d, c, b, a, high in the left, low on the right. For example, when LED7S output for " 1101101"　digital tube 7 paragraph g, f, e, d, c, b, a, respectively 1,1,0,1,1,1,0,1. Access the high level segment shiny, so the digital display " 5" .