文件名称:exp12

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 998kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 真***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

本实验要完成的任务就是设计一个频率计,系统时钟选择核心板上的50MHz的时钟,闸门时间为1s(通过对系统时钟进行分频得到),在闸门为高电平期间,对输入的频率进行计数,当闸门变低的时候,记录当前的频率值,并将频率计数器清零,频率的显示每过2秒刷新一次。被测频率通过一个拨动开关来选择是使用系统中的数字时钟源模块的时钟信号还是从外部通过系统的输入输出模块的输入端输入一个数字信号进行频率测量。当拨动开关为高电平时,测量系统数字时钟信号模块的数字信号,否则测量从外部输入的数字信号。-To complete the task of the experiment is to design a frequency meter, the system clock select core board 50MHz clock, the gate time is 1s (system clock divider), at the gate during the high input frequency counted, recorded when the gate goes low when the current value of the frequency and the frequency counter is cleared, the frequency display every two seconds to refresh. Measured frequency via a toggle switch to select the digital clock source module using the system clock signal from an external digital signal input through the input end of the system' s input and output modules for frequency measurement. When the toggle switch is high, the module of the digital signal of the digital clock signal of the measurement system, otherwise the measurements input from the outside, the digital signal.
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下载文件列表





exp12\clkout.bsf

.....\clkout.vhd

.....\clkout.vhd.bak

.....\CNT10.bsf

.....\CNT10.vhd

.....\db\exp12.asm.qmsg

.....\..\exp12.asm_labs.ddb

.....\..\exp12.cbx.xml

.....\..\exp12.cmp.bpm

.....\..\exp12.cmp.cdb

.....\..\exp12.cmp.ecobp

.....\..\exp12.cmp.hdb

.....\..\exp12.cmp.kpt

.....\..\exp12.cmp.logdb

.....\..\exp12.cmp.rdb

.....\..\exp12.cmp.tdb

.....\..\exp12.cmp0.ddb

.....\..\exp12.cmp_merge.kpt

.....\..\exp12.db_info

.....\..\exp12.eco.cdb

.....\..\exp12.eda.qmsg

.....\..\exp12.eds_overflow

.....\..\exp12.fit.qmsg

.....\..\exp12.fnsim.hdb

.....\..\exp12.fnsim.qmsg

.....\..\exp12.hier_info

.....\..\exp12.hif

.....\..\exp12.lpc.html

.....\..\exp12.lpc.rdb

.....\..\exp12.lpc.txt

.....\..\exp12.map.bpm

.....\..\exp12.map.cdb

.....\..\exp12.map.ecobp

.....\..\exp12.map.hdb

.....\..\exp12.map.kpt

.....\..\exp12.map.logdb

.....\..\exp12.map.qmsg

.....\..\exp12.map_bb.cdb

.....\..\exp12.map_bb.hdb

.....\..\exp12.map_bb.logdb

.....\..\exp12.pre_map.cdb

.....\..\exp12.pre_map.hdb

.....\..\exp12.rpp.qmsg

.....\..\exp12.rtlv.hdb

.....\..\exp12.rtlv_sg.cdb

.....\..\exp12.rtlv_sg_swap.cdb

.....\..\exp12.sgate.rvd

.....\..\exp12.sgate_sm.rvd

.....\..\exp12.sgdiff.cdb

.....\..\exp12.sgdiff.hdb

.....\..\exp12.sim.cvwf

.....\..\exp12.sim.hdb

.....\..\exp12.sim.qmsg

.....\..\exp12.sim.rdb

.....\..\exp12.simfam

.....\..\exp12.sld_design_entry.sci

.....\..\exp12.sld_design_entry_dsc.sci

.....\..\exp12.syn_hier_info

.....\..\exp12.tan.qmsg

.....\..\exp12.tis_db_list.ddb

.....\..\exp12.tmw_info

.....\..\exp12_global_asgn_op.abo

.....\..\mux_3nc.tdf

.....\..\mux_joc.tdf

.....\..\prev_cmp_exp12.asm.qmsg

.....\..\prev_cmp_exp12.eda.qmsg

.....\..\prev_cmp_exp12.fit.qmsg

.....\..\prev_cmp_exp12.map.qmsg

.....\..\prev_cmp_exp12.qmsg

.....\..\prev_cmp_exp12.sim.qmsg

.....\..\prev_cmp_exp12.tan.qmsg

.....\..\wed.wsf

.....\display.bsf

.....\display.vhd

.....\display.vhd.bak

.....\exp12.asm.rpt

.....\exp12.bdf

.....\exp12.done

.....\exp12.dpf

.....\exp12.eda.rpt

.....\exp12.fit.rpt

.....\exp12.fit.smsg

.....\exp12.fit.summary

.....\exp12.flow.rpt

.....\exp12.map.rpt

.....\exp12.map.summary

.....\exp12.pin

.....\exp12.pof

.....\exp12.qpf

.....\exp12.qsf

.....\exp12.qws

.....\exp12.sim.rpt

.....\exp12.sof

.....\exp12.tan.rpt

.....\exp12.tan.summary

.....\incremental_db\compiled_partitions\exp12.root_partition.cmp.atm

.....\..............\...................\exp12.root_partition.cmp.dfp

.....\..............\...................\exp12.root_partition.cmp.hdbx

.....\..............\...................\exp12.root_partition.cmp.kpt

.....\..............\...................\exp12.root_partition.cmp.logdb

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