文件名称:fifo_syn

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 161kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 张**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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实现了同步FIFO的功能,能完成数据的先进先出,当FIFO满或者空的时候能报出满或者空的信号。-Synchronous FIFO: it can complete data FIFO, when the FIFO full or empty time can you quote us full or empty signal.


(系统自动生成,下载前可以参看下载内容)

下载文件列表





fifo_syn\fifo_syn.cmd_log

........\fifo_syn.gise

........\fifo_syn.ise

........\fifo_syn.lso

........\fifo_syn.ngc

........\fifo_syn.ngr

........\fifo_syn.prj

........\fifo_syn.stx

........\fifo_syn.syr

........\fifo_syn.v

........\fifo_syn.xise

........\fifo_syn.xst

........\fifo_syn_summary.html

........\.........xdb\tmp\ise\version

........\............\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject

........\............\...\...\............\..................\.........\HDProject_StrTbl

........\............\...\...\............\PnAutoRun\Scripts\RunOnce_tcl

........\............\...\...\............\.........\.......\RunOnce_tcl_StrTbl

........\............\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main

........\............\...\...\............\................\................\dpm_project_main_StrTbl

........\............\...\...\............\................Gui\CSourceProcessView

........\............\...\...\............\...................\CSourceProcessView_StrTbl

........\............\...\...\............\...................\CViewSelector

........\............\...\...\............\...................\CViewSelector_StrTbl

........\............\...\...\............\...................\File-SynthesisOnly

........\............\...\...\............\...................\File-SynthesisOnly_StrTbl

........\............\...\...\............\...................\Library-SynthesisOnly

........\............\...\...\............\...................\Library-SynthesisOnly_StrTbl

........\............\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG

........\............\...\...\............\...................\Process-BehavioralSim-DESUT_VERILOG_StrTbl

........\............\...\...\............\...................\Process-SynthesisOnly-

........\............\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG

........\............\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl

........\............\...\...\............\...................\Process-SynthesisOnly-_StrTbl

........\............\...\...\............\...................\Source-BehavioralSim-AutoCompile

........\............\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl

........\............\...\...\............\...................\Source-SynthesisOnly-AutoCompile

........\............\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl

........\............\...\...\............\xreport\Gc_RvReportViewer-Current-Module

........\............\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl

........\............\...\...\............\.......\Gc_RvReportViewer-Module-Data-fifo_syn

........\............\...\...\............\.......\Gc_RvReportViewer-Module-Data-fifo_syn_StrTbl

........\............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default

........\............\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl

........\............\...\...\..REGISTRY__\Autonym\regkeys

........\............\...\...\............\bitgen\regkeys

........\............\...\...\............\...init\regkeys

........\............\...\...\............\common\regkeys

........\............\...\...\............\.pldfit\regkeys

........\............\...\...\............\dumpngdio\regkeys

........\............\...\...\............\fuse\regkeys

........\............\...\...\............\HierarchicalDesign\HDProject\regkeys

........\............\...\...\............\..................\regkeys

........\............\...\...\............\hprep6\regkeys

........\............\...\...\............\idem\regkeys

........\............\...\...\............\libgen\regkeys

........\............\...\...\............\map\regkeys

........\............\...\...\............\netgen\regkeys

........\............\...\...\............\.gc2edif\regkeys

........\............\...\...\............\...build\regkeys

........\............\...\...\............\

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