文件名称:zuoye2

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2013-09-18
  • 文件大小:
  • 3.56mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 林*
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  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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主要编写了一组二进制数据通过根升余弦滤波器后的波形,但并没有使用ISE内部的FIR滤波器内核,该程序相当于编写了一个根升余弦滤波器。-Mainly prepared a set of binary data through the root raised cosine filter waveform after, but did not use the ISE internal FIR filter kernel, the program is equivalent to the preparation of a root raised cosine filter.
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下载文件列表





zuoye2\ipcore_dir\coregen.cgp

......\..........\coregen.log

......\..........\create_rcosfir_ROM.tcl

......\..........\create_ROM_sig.tcl

......\..........\edit_rcosfir_ROM.tcl

......\..........\edit_ROM_sig.tcl

......\..........\rcosfir_ROM\blk_mem_gen_v7_2_readme.txt

......\..........\...........\doc\blk_mem_gen_v7_2_vinfo.html

......\..........\...........\...\pg058-blk-mem-gen.pdf

......\..........\...........\example_design\rcosfir_ROM_exdes.ucf

......\..........\...........\..............\rcosfir_ROM_exdes.vhd

......\..........\...........\..............\rcosfir_ROM_exdes.xdc

......\..........\...........\..............\rcosfir_ROM_prod.vhd

......\..........\...........\implement\implement.bat

......\..........\...........\.........\implement.sh

......\..........\...........\.........\planAhead_ise.bat

......\..........\...........\.........\planAhead_ise.sh

......\..........\...........\.........\planAhead_ise.tcl

......\..........\...........\.........\xst.prj

......\..........\...........\.........\xst.scr

......\..........\...........\simulation\addr_gen.vhd

......\..........\...........\..........\bmg_stim_gen.vhd

......\..........\...........\..........\bmg_tb_pkg.vhd

......\..........\...........\..........\functional\simcmds.tcl

......\..........\...........\..........\..........\simulate_isim.bat

......\..........\...........\..........\..........\simulate_mti.bat

......\..........\...........\..........\..........\simulate_mti.do

......\..........\...........\..........\..........\simulate_mti.sh

......\..........\...........\..........\..........\simulate_ncsim.sh

......\..........\...........\..........\..........\simulate_vcs.sh

......\..........\...........\..........\..........\ucli_commands.key

......\..........\...........\..........\..........\vcs_session.tcl

......\..........\...........\..........\..........\wave_mti.do

......\..........\...........\..........\..........\wave_ncsim.sv

......\..........\...........\..........\random.vhd

......\..........\...........\..........\rcosfir_ROM_synth.vhd

......\..........\...........\..........\rcosfir_ROM_tb.vhd

......\..........\...........\..........\timing\simcmds.tcl

......\..........\...........\..........\......\simulate_isim.bat

......\..........\...........\..........\......\simulate_mti.bat

......\..........\...........\..........\......\simulate_mti.do

......\..........\...........\..........\......\simulate_mti.sh

......\..........\...........\..........\......\simulate_ncsim.sh

......\..........\...........\..........\......\simulate_vcs.sh

......\..........\...........\..........\......\ucli_commands.key

......\..........\...........\..........\......\vcs_session.tcl

......\..........\...........\..........\......\wave_mti.do

......\..........\...........\..........\......\wave_ncsim.sv

......\..........\rcosfir_ROM.asy

......\..........\rcosfir_ROM.gise

......\..........\rcosfir_ROM.mif

......\..........\rcosfir_ROM.ncf

......\..........\rcosfir_ROM.ngc

......\..........\rcosfir_ROM.sym

......\..........\rcosfir_ROM.v

......\..........\rcosfir_ROM.veo

......\..........\rcosfir_ROM.xco

......\..........\rcosfir_ROM.xise

......\..........\rcosfir_ROM_flist.txt

......\..........\rcosfir_ROM_synth.v

......\..........\rcosfir_ROM_xmdf.tcl

......\..........\ROM_sig\blk_mem_gen_v7_2_readme.txt

......\..........\.......\doc\blk_mem_gen_v7_2_vinfo.html

......\..........\.......\...\pg058-blk-mem-gen.pdf

......\..........\.......\example_design\ROM_sig_exdes.ucf

......\..........\.......\..............\ROM_sig_exdes.vhd

......\..........\.......\..............\ROM_sig_exdes.xdc

......\..........\.......\..............\ROM_sig_prod.vhd

......\..........\.......\implement\implement.bat

......\..........\.......\.........\implement.sh

......\..........\.......\.........\planAhead_ise.bat

......\..........\.......\.........\planAhead_ise.sh

......\..........\.......\.........\planAhead_ise.tcl

......\..........\.......\.........\xst.prj

......\..........\.......\.........\xst.scr

......\..........\.......\simulation\addr_gen.vhd

......\..........\

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